A physically based compact analytical single electron transistor (SET) model is proposed for
hybrid CMOS-SET analog circuit simulation. The modeling approach is based on the" …

This paper proposes a new dynamic behavior model for single-electron transistors (SETs). A
comprehensive review of modeling techniques and previous models was carried out aiming …

A novel complimentary metal-oxide-semiconductor (CMOS) single-electron transistor (SET)
hybrid architecture, named SETMOS, is proposed, which offers Coulomb blockade …

In this paper, we discuss modeling and simulation of single dot Single Electron Transistor
(SET) using master equation approximation. For SET modeling and simulation, master …

We examine the performance of custom circuits in an emerging technology known as three-
dimensional integration. By combining multiple device layers with a high-density inter-layer …

In this paper, CMOS evolution and their fundamental and practical limitations are briefly
reviewed, and the working principles, performance, and fabrication of single-electron …

A compact and analytical model for silicon single-electron transistors (SETs) considering the
discrete quantum energy levels and the parabolic tunneling barriers is proposed. The model …

This paper proposes two kinds of novel hybrid voltage controlled ring oscillators (VCO)
using a single electron transistor (SET) and metal-oxide-semiconductor (MOS) transistor …

In this paper, various circuit and system level design challenges for nanometer-scale
devices and single-electron transistors are discussed, with an emphasis to the functional …

This paper proposes two kinds of novel single-electron analog-digital conversion (ADC) and
digital-analog conversion (DAC) circuits that consist of single-electron transistors (SETs) and …