Structural reliability analysis: A Bayesian perspective

C Dang, MA Valdebenito, MGR Faes, P Wei, M Beer - Structural Safety, 2022 - Elsevier
Numerical methods play a dominant role in structural reliability analysis, and the goal has
long been to produce a failure probability estimate with a desired level of accuracy using a …

Estimation of small failure probability using generalized subset simulation

K Cheng, Z Lu, S **ao, J Lei - Mechanical Systems and Signal Processing, 2022 - Elsevier
This paper proposes a generalized subset simulation (GSS) method for estimating small
failure probability. The basic idea is to modify the failure threshold and amplify the variability …

Efficient yield optimization for analog and SRAM circuits via Gaussian process regression and adaptive yield estimation

M Wang, W Lv, F Yang, C Yan, W Cai… - … on Computer-Aided …, 2017 - ieeexplore.ieee.org
In this paper, a Bayesian optimization approach is proposed for yield optimization of analog
and SRAM circuits. Gaussian process (GP) regression is employed to predict the yield over …

Autoprivacy: Automated layer-wise parameter selection for secure neural network inference

Q Lou, S Bian, L Jiang - Advances in Neural Information …, 2020 - proceedings.neurips.cc
Abstract Hybrid Privacy-Preserving Neural Network (HPPNN) implementing linear layers by
Homomorphic Encryption (HE) and nonlinear layers by Garbled Circuit (GC) is one of the …

A review of bayesian methods in electronic design automation

Z Gao, DS Boning - arxiv preprint arxiv:2304.09723, 2023 - arxiv.org
The utilization of Bayesian methods has been widely acknowledged as a viable solution for
tackling various challenges in electronic integrated circuit (IC) design under stochastic …

High-dimensional and multiple-failure-region importance sampling for SRAM yield analysis

M Wang, C Yan, X Li, D Zhou… - IEEE Transactions on Very …, 2016 - ieeexplore.ieee.org
The failure rate of static RAM (SRAM) cells is restricted to be extremely low to ensure
sufficient high yield for the entire chip. In addition, multiple performances of interest and …

Fast statistical analysis of rare circuit failure events via subset simulation in high-dimensional variation space

S Sun, X Li - 2014 IEEE/ACM International Conference on …, 2014 - ieeexplore.ieee.org
In this paper, we propose a novel subset simulation (SUS) technique to efficiently estimate
the rare failure rate for nanoscale circuit blocks (eg, SRAM, DFF, etc.) in high-dimensional …

Enabling high-dimensional Bayesian optimization for efficient failure detection of analog and mixed-signal circuits

H Hu, P Li, JZ Huang - Proceedings of the 56th Annual Design …, 2019 - dl.acm.org
With increasing design complexity and stringent robustness requirements in application
such as automotive electronics, analog and mixed-signal (AMS) verification becomes akey …

Fast and efficient high-sigma yield analysis and optimization using kernel density estimation on a bayesian optimized failure rate model

DD Weller, M Hefenbrock, M Beigl… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
With ever-increasing transistor density in nanoscale-integrated circuits, the impact of
process variations on circuit performance and chip yield becomes dominant. To prevent …

CAD for Analog/Mixed‐Signal Integrated Circuits

AF Budak, DZ Pan, H Chen, K Zhu… - Advances in …, 2022 - Wiley Online Library
While digital integrated circuits (ICs) has adopted highly automated computer aided design
(CAD) tools for decades including synthesis, placement, and routing, analog, and mixed …