A review on SRAM-based computing in-memory: Circuits, functions, and applications
Z Lin, Z Tong, J Zhang, F Wang, T Xu… - Journal of …, 2022 - iopscience.iop.org
Artificial intelligence (AI) processes data-centric applications with minimal effort. However, it
poses new challenges to system design in terms of computational speed and energy …
poses new challenges to system design in terms of computational speed and energy …
Two-direction in-memory computing based on 10T SRAM with horizontal and vertical decoupled read ports
Z Lin, Z Zhu, H Zhan, C Peng, X Wu… - IEEE Journal of Solid …, 2021 - ieeexplore.ieee.org
In-memory computing establishes a new and promising computing paradigm aimed at
solving problems caused by the von Neumann bottleneck. It eliminates the need for frequent …
solving problems caused by the von Neumann bottleneck. It eliminates the need for frequent …
A single-bitline 9T SRAM for low-power near-threshold operation in FinFET technology
Static random-access memories (SRAMs), which are the most ubiquitous in modern system-
on-chips, suffer from high power dissipation and poor stability in advanced complementary …
on-chips, suffer from high power dissipation and poor stability in advanced complementary …
Low-power near-threshold 10T SRAM bit cells with enhanced data-independent read port leakage for array augmentation in 32-nm CMOS
The conventional six-transistor static random access memory (SRAM) cell allows high
density and fast differential sensing but suffers from half-select and read-disturb issues …
density and fast differential sensing but suffers from half-select and read-disturb issues …
Energy-efficient single-ended read/write 10t near-threshold sram
Modern system-on-chip-based applications require low-power/energy SRAMs for long-term
operation. To deal with this issue, near-threshold SRAM design is an effective approach. In …
operation. To deal with this issue, near-threshold SRAM design is an effective approach. In …
Design of a Schmitt-trigger-based 7T SRAM cell for variation resilient low-energy consumption and reliable internet of things applications
The internet of things (IoTs)-based systems require battery-enabled energy-efficient memory
circuits to operate at low voltage domain, especially below the transistor's threshold. This …
circuits to operate at low voltage domain, especially below the transistor's threshold. This …
Cascade current mirror to improve linearity and consistency in SRAM in-memory computing
Z Lin, H Zhan, Z Chen, C Peng, X Wu… - IEEE Journal of Solid …, 2021 - ieeexplore.ieee.org
Although multirow read is essential to achieve static random access memory (SRAM) in-
memory computing (IMC), it may undermine circuit linearity and computational consistency …
memory computing (IMC), it may undermine circuit linearity and computational consistency …
A highly stable low-energy 10T SRAM for near-threshold operation
E Abbasian - IEEE Transactions on Circuits and Systems I …, 2022 - ieeexplore.ieee.org
This paper aims to explore the design of a novel highly stable low-energy 10T (SLE10T)
SRAM cell for near-threshold operation. The latch core of the proposed design consists of a …
SRAM cell for near-threshold operation. The latch core of the proposed design consists of a …
Low leakage fully half-select-free robust SRAM cells with BTI reliability analysis
This paper presents two different topologies of 11T SRAM cells with fully half-select-free
robust operation for bit-interleaving implementation. The proposed 11T-1 and 11T-2 cells …
robust operation for bit-interleaving implementation. The proposed 11T-1 and 11T-2 cells …
Single‐ended half‐select disturb‐free 11T static random access memory cell for reliable and low power applications
This paper presents an 11 transistor (SEHF11T) static random access memory (SRAM) cell
with high read static noise margin (RSNM) and write static noise margin (WSNM). It …
with high read static noise margin (RSNM) and write static noise margin (WSNM). It …