Optimization of design space for vertically stacked junctionless nanosheet FET for analog/RF applications

S Valasa, S Tayal, LR Thoutam - Silicon, 2022 - Springer
This paper investigates the various device dimensions such as gate length (Lg), nanosheet
thickness (TNS), and nanosheet width to optimize the design space for vertically stacked …

Investigation of electronic structure, optical properties, map of electrostatic potential, and toxicity of Hfo2, Hf0. 88si0. 12o2, Hf0. 88Ge0. 12o2 and Hf0. 88Sn0. 12O2 by …

U Chakma, A Kumer, MA Al Mashud… - Journal of …, 2023 - Springer
This research work presents a computational investigation of hafnium (IV) oxide and its
crystals doped by Si, Ge and Sn atoms, replacing the oxygen atom in HfO2. Hafnium (IV) …

Drain current modelling of asymmetric junctionless dual material double gate MOSFET with high K gate stack for analog and RF performance

A Basak, A Sarkar - Silicon, 2020 - Springer
This paper presents the continuous 2D analytical modelling of electrostatic potential,
threshold voltage (V th), subthreshold swing, drain induced barrier lowering (DIBL) and …

A design of nanoscale double-gate FET based ring oscillator with improved oscillation frequency using device engineering

S Seifollahi, SAS Ziabari, A Kiani-Sarkaleh - AEU-International Journal of …, 2021 - Elsevier
In this paper, the performance of inverter and ring oscillator circuits based on the nanoscale
double-gate (DG) FET is improved by using device engineering approaches. The …

Dual-metal double-gate with low-k/high-k oxide stack junctionless MOSFET for a wide range of protein detection: a fully electrostatic based numerical approach

A Chattopadhyay, S Tewari, PS Gupta - Silicon, 2021 - Springer
We investigate the performance of a dielectric modulated dual-metal double-gate with low-
k/high-k oxide stack junctionless MOSFET (DM-DG-LK/HK-S JL-MOSFET) based sensor …

Optimized Gate Metal Variant Structure for Graded-Channel (GC) Gate-Stack (GS) Double-Gate (DG) MOSFET to Enhance Switching Speed, Analog and RF …

D Chowdhury, S DasMahapatra, BP De, M Maiti… - Journal of Electronic …, 2024 - Springer
Graded-channel gate-stack double-gate metal-oxide-semiconductor field-effect transistors
(GC-GS-DG-MOSFETs) with symmetric single-material-gate-metal (D1), asymmetric single …

Analog and RF performance of a multigate FinFET at nano scale

A Kumar - Superlattices and Microstructures, 2016 - Elsevier
In this paper, analog and RF performance of the Fin field effect transistor (FET) at Nano
scale is observed through 3D simulation. FinFET devices like rectangular gate all around …

Study of analog/Rf and stability investigation of surrounded gate junctionless graded channel MOSFET (SJLGC MOSFET)

S Misra, SM Biswal, B Baral, SK Swain, SK Pati - Silicon, 2021 - Springer
This paper explores the potential advantage of surrounded gate junctionless graded
channel (SJLGC) MOSFET in the view of its Analog, RF performances using ATLAS TCAD …

The analog/RF performance of a strained-Si graded-channel dual-material double-gate MOSFET with interface charges

SR Suddapalli, BR Nistala - Journal of Computational Electronics, 2021 - Springer
The analog/radiofrequency (RF) performance of a strained-silicon (s-Si) graded-channel
dual-material double gate (GC-DMDG) metal–oxide–semiconductor field-effect transistor …

A Novel Dielectric Modulated Gate-Stack Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistor-Based Sensor for Detecting Biomolecules

D Chowdhury, BP De, B Appasani, NK Singh, R Kar… - Sensors, 2023 - mdpi.com
In this article, the performance of n-type junctionless (JL) double-gate (DG) MOSFET-based
biosensors with and without gate stack (GS) has been studied. Here, the dielectric …