Oversampling ADC: A Review of Recent Design Trends
A Verreault, PV Cicek, A Robichaud - IEEE Access, 2024 - ieeexplore.ieee.org
Oversampling analog-to-digital converters (ADC) serve as the backbone of high-
performance, high-precision data interfaces, owing to their remarkable ability to filter out …
performance, high-precision data interfaces, owing to their remarkable ability to filter out …
A 150-MS/s fully dynamic SAR-assisted pipeline ADC using a floating ring amplifier and gain-enhancing miller negative-C
This article introduces a fully dynamic SAR-assisted pipeline ADC that uses a floating ring
amplifier (FLORA) and gain-enhancing Miller negative capacitance (Miller negative-C) …
amplifier (FLORA) and gain-enhancing Miller negative capacitance (Miller negative-C) …
SAR-Assisted Energy-Efficient Hybrid ADCs
The distinct advantages of low power consumption and hardware compactness make SAR
ADCs especially appealing in scaled CMOS technologies, garnering significant attention …
ADCs especially appealing in scaled CMOS technologies, garnering significant attention …
A high-resolution pipelined-SAR ADC using cyclically charged floating inverter amplifier
This article presents an energy-efficient and easily adjustable floating-inverter amplifier
(FIA), named the cyclically charged FIA (CC-FIA). Its bias point can be adjusted to a stable …
(FIA), named the cyclically charged FIA (CC-FIA). Its bias point can be adjusted to a stable …
A 2-mW 70.7-dB SNDR 200-MS/s Pipelined-SAR ADC Using Continuous-Time SAR-Assisted Detect-and-Skip and Open-Then-Close Correlated Level Shifting
This work presents a 2-mW 70.7-dB SNDR 200-MS/s pipelined-successive-approximation-
register (SAR) analog-to-digital converter (ADC) with a continuous-time SAR-assisted detect …
register (SAR) analog-to-digital converter (ADC) with a continuous-time SAR-assisted detect …
A Variation-Tolerant Continuous-Time Ising Machine With eDRAM-Based Spin Interaction and Leaked Negative Feedback Annealing
Combinatorial optimization problems (COPs) are essential in various real-world decision-
making scenarios, yet most COPs are classified as non-deterministic polynomial-time (NP) …
making scenarios, yet most COPs are classified as non-deterministic polynomial-time (NP) …
A 2.2-ps Time-of-Flight Resolution Frequency-Domain fNIRS Readout IC With a Dynamic Architecture and Cross-Coupling-Free Intensity and Phase-to-Digital …
Z Ma, Y Lin, C Chen, X Qi, Y Li, KT Tang… - IEEE Journal of Solid …, 2024 - ieeexplore.ieee.org
This article presents a fully integrated frequency-domain (FD) functional near-infrared
spectroscopy (fNIRS) detection integrated circuit (IC) designed for non-invasive …
spectroscopy (fNIRS) detection integrated circuit (IC) designed for non-invasive …
A 4-bit Calibration-Free Computing-In-Memory Macro With 3T1C Current-Programed Dynamic-Cascode Multi-Level-Cell eDRAM
Analog computing-in-memory (CIM) has been widely explored for computing neural
networks (NNs) efficiently. However, most analog CIM implementations trade compute …
networks (NNs) efficiently. However, most analog CIM implementations trade compute …
An Energy-Efficient, High-Resolution kT/C-Noise-Canceled Pipelined-SAR Capacitance-to-Digital Converter With Incomplete-Settling-Based Correlated Level Shifting …
This article presents a high-resolution and energy-efficient pipelined-successive-
approximation-register (SAR) capacitance-to-digital converter (CDC). The converter uses a …
approximation-register (SAR) capacitance-to-digital converter (CDC). The converter uses a …
A 28nm CMOS 12-bit-600-MS/s 15.6 mW pipelined ADC with two-stage gainboosting FIA-based RA
B Gao, L Zhang, R Mabilangan, CU Park… - 2024 IEEE Asian …, 2024 - ieeexplore.ieee.org
Pipelined ADCs have been a preferred architecture for high-resolution and high-speed
applications 1, 2. In typical pipelined ADCs, the residue amplifier (RA) plays a crucial role in …
applications 1, 2. In typical pipelined ADCs, the residue amplifier (RA) plays a crucial role in …