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A survey of computer architecture simulation techniques and tools
Computer architecture simulators play an important role in advancing computer architecture
research. With wider research directions and the increased number of simulators that have …
research. With wider research directions and the increased number of simulators that have …
Ramulator: A fast and extensible DRAM simulator
Recently, both industry and academia have proposed many different roadmaps for the future
of DRAM. Consequently, there is a growing need for an extensible DRAM simulator, which …
of DRAM. Consequently, there is a growing need for an extensible DRAM simulator, which …
Graphene: Strong yet lightweight row hammer protection
Row Hammer is a serious security threat to modern computing systems using DRAM as
main memory. It causes charge loss in DRAM cells adjacent to a frequently activated …
main memory. It causes charge loss in DRAM cells adjacent to a frequently activated …
Shadow: Preventing row hammer in dram with intra-subarray row shuffling
As Row Hammer (RH) attacks have been a critical threat to computer systems, numerous
hardware-based (HWbased) RH mitigation strategies have been proposed. However, the …
hardware-based (HWbased) RH mitigation strategies have been proposed. However, the …
TWiCe: Preventing row-hammering by exploiting time window counters
Computer systems using DRAM are exposed to row-hammer (RH) attacks, which can flip
data in a DRAM row without directly accessing a row but by frequently activating its adjacent …
data in a DRAM row without directly accessing a row but by frequently activating its adjacent …
A survey of cache simulators
Computer architecture simulation tools are essential for implementing and evaluating new
ideas in the domain and can be useful for understanding the behavior of programs and …
ideas in the domain and can be useful for understanding the behavior of programs and …
Kiln: Closing the performance gap between systems with and without persistence support
Persistent memory is an emerging technology which allows in-memory persistent data
objects to be updated at much higher throughput than when using disks as persistent …
objects to be updated at much higher throughput than when using disks as persistent …
uops. info: Characterizing latency, throughput, and port usage of instructions on intel microarchitectures
Modern microarchitectures are some of the world's most complex man-made systems. As a
consequence, it is increasingly difficult to predict, explain, let alone optimize the …
consequence, it is increasingly difficult to predict, explain, let alone optimize the …
Mithril: Cooperative row hammer protection on commodity dram leveraging managed refresh
Since its public introduction in the mid-2010s, the Row Hammer (RH) phenomenon has
drawn significant attention from the research community due to its security implications …
drawn significant attention from the research community due to its security implications …
Making DRAM stronger against row hammering
Modern DRAM suffers from a new problem called row hammering. The problem is expected
to become more severe in future DRAMs mostly due to increased inter-row coupling at …
to become more severe in future DRAMs mostly due to increased inter-row coupling at …