A comprehensive review of advanced trends: from artificial synapses to neuromorphic systems with consideration of non-ideal effects

K Kim, MS Song, H Hwang, S Hwang… - Frontiers in Neuroscience, 2024 - frontiersin.org
A neuromorphic system is composed of hardware-based artificial neurons and synaptic
devices, designed to improve the efficiency of neural computations inspired by energy …

Layer ensemble averaging for fault tolerance in memristive neural networks

O Yousuf, BD Hoskins, K Ramu, M Fream… - Nature …, 2025 - nature.com
Artificial neural networks have advanced due to scaling dimensions, but conventional
computing struggles with inefficiencies due to memory bottlenecks. In-memory computing …

Experimental assessment of multilevel rram-based vector-matrix multiplication operations for in-memory computing

EPB Quesada, MK Mahadevaiah… - … on Electron Devices, 2023 - ieeexplore.ieee.org
Resistive random access memory (RRAM)-based hardware accelerators are playing an
important role in the implementation of in-memory computing (IMC) systems for artificial …

Layer Ensemble Averaging for Improving Memristor-Based Artificial Neural Network Performance

O Yousuf, B Hoskins, K Ramu, M Fream… - ar** Quantized Neural Networks on hybrid CMOS-OxRAM building blocks
SK Kingra, V Parmar, M Sharma… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
In this work, we experimentally demonstrate two key building blocks for realizing
Binary/Ternary Neural Networks (BNNs/TNNs):(i) 130 nm CMOS based sigmoidal neurons …

The Lynchpin of In-Memory Computing: A Benchmarking Framework for Vector-Matrix Multiplication in RRAMs

MTR Chowdhury, HQN Vo, P Ramanan… - 2024 International …, 2024 - ieeexplore.ieee.org
The Von Neumann bottleneck, a fundamental challenge in conventional computer
architecture, arises from the inability to execute fetch and data operations simultaneously …

A CMOS Analog Neuron Circuit with A Multi-Level Memory

MD Edwards, NJ Sarhan… - … on Microelectronics (ICM), 2023 - ieeexplore.ieee.org
This paper presents a CMOS-based analog neuron circuit that utilizes a multi-level analog
memory that is useful for mixed signal neural networks. The implementation of neural …

[HTML][HTML] Analysis of VMM computation strategies to implement BNN applications on RRAM arrays

V Parmar, SK Kingra, S Negi, M Suri - APL Machine Learning, 2023 - pubs.aip.org
The growing interest in edge-AI solutions and advances in the field of quantized neural
networks have led to hardware efficient binary neural networks (BNNs). Extreme BNNs …

A failure analysis framework of ReRAM In-Memory Logic operations

L Brackmann, A Jafari, C Bengel… - … Test Conference in …, 2022 - ieeexplore.ieee.org
Computation-in-Memory (CiM) with emerging non-volatile memories leads to significant
performance and energy efficiency, which is a promising approach to address so-called …