Reversible computing with fast, fully static, fully adiabatic CMOS

MP Frank, RW Brocato, BD Tierney… - 2020 International …, 2020 - ieeexplore.ieee.org
To advance the energy efficiency of general digital computing far beyond the
thermodynamic limits that apply to conventional digital circuits will require utilizing the …

DPA-secured quasi-adiabatic logic (SQAL) for low-power passive RFID tags employing S-boxes

M Avital, H Dagan, I Levi, O Keren… - IEEE Transactions on …, 2014 - ieeexplore.ieee.org
Low-power mobile devices such as RFID tags and WSNs that employ AES cryptographic
modules are susceptible to differential power analysis (DPA) attacks. This paper presents a …

Principles of low dissipation computing from a stochastic circuit model

CY Gao, DT Limmer - Physical Review Research, 2021 - APS
We introduce a thermodynamically consistent, minimal stochastic model for complementary
logic gates built with field-effect transistors. We characterize the performance of such gates …

Adiabatic leaky integrate and fire neurons with refractory period for ultra low energy neuromorphic computing

M Massarotto, S Saggini, M Loghi… - npj Unconventional …, 2024 - nature.com
In recent years, the in-memory-computing in charge domain has gained significant interest
as a promising solution to further enhance the energy efficiency of neuromorphic hardware …

[PDF][PDF] Driving Fully-Adiabatic Logic Circuits Using Custom High-Q MEMS Resonators.

V Anantharam, M He, K Natarajan, H **e, MP Frank - ESA/VLSI, 2004 - Citeseer
To perform digital logic in CMOS in a truly adiabatic (asymptotically thermodynamically
reversible) fashion requires that logic transitions be driven by a quasitrapezoidal (flat …

Design and analysis of new ultra low power CMOS Based flip-flop approaches

NR Jangam, L Guthikinda, GP Ramesh - Distributed Computing and …, 2022 - Springer
The flip flops are essential part of the clocking circuits in complementary metal oxide
semiconductor circuit based designs. The adiabatic flip flops are more useful in digital …

Charge-recovery power clock generators for adiabatic logic circuits

M Arsalan, M Shams - … Conference on VLSI Design held jointly …, 2005 - ieeexplore.ieee.org
To get maximum energy efficiency from adiabatic logic circuits several charge-recovery
power clock generators (PCGs) have been published in recent years. This paper compares …

Quantum foundations of classical reversible computing

MP Frank, K Shukla - Entropy, 2021 - mdpi.com
The reversible computation paradigm aims to provide a new foundation for general classical
digital computing that is capable of circumventing the thermodynamic limits to the energy …

Design automation for adiabatic circuits

A Zulehner, MP Frank, R Wille - Proceedings of the 24th Asia and South …, 2019 - dl.acm.org
Adiabatic circuits are heavily investigated since they allow for computations with an
asymptotically close to zero energy dissipation per operation---serving as an alternative …

Synthesis of dual-rail adiabatic logic for low power security applications

M Morrison, N Ranganathan - IEEE Transactions on Computer …, 2014 - ieeexplore.ieee.org
Programmable reversible logic is emerging as a prospective logic design style for
implementation in low power, low frequency applications where minimal impact on circuit …