[HTML][HTML] An overview of systolic arrays for forward and inverse discrete sine transforms and their exploitation in view of an improved approach

DF Chiper, A Cracan, VD Andries - Electronics, 2022 - mdpi.com
This paper aims to present a unified overview of the main Very Large-Scale Integration
(VLSI) implementation solutions of forward and inverse discrete sine transforms using …

An Efficient Algorithm and Architecture for the VLSI Implementation of Integer DCT That Allows an Efficient Incorporation of the Hardware Security with a Low …

DF Chiper, A Cracan - Applied Sciences, 2023 - mdpi.com
In this paper, we propose a new hardware algorithm for an integer based discrete cosine
transform (IntDCT) that was designed to allow an efficient VLSI implementation of the …

[HTML][HTML] A new approach for a unified architecture for type IV DCT/DST with an efficient incorporation of obfuscation technique

DF Chiper, LT Cotorobai - Electronics, 2021 - mdpi.com
This paper aims at solving one challenging problem in designing VLSI chips, namely, the
security of the hardware, by presenting a new design approach that incorporates the …

A novel VLSI DHT algorithm for a highly modular and parallel architecture

DF Chiper - IEEE Transactions on Circuits and Systems II …, 2013 - ieeexplore.ieee.org
A new very large scale integration (VLSI) algorithm for a 2 N-length discrete Hartley
transform (DHT) that can be efficiently implemented on a highly modular and parallel VLSI …

A New Systolic Array Algorithm and Architecture for the VLSI Implementation of IDST Based on a Pseudo-Band Correlation Structure.

DF Chiper, A Cracan - Advances in Electrical & Computer …, 2017 - search.ebscohost.com
In this paper a new linear VLSI array architecture for the VLSI implementation of a prime-
length 1-D Inverse Discrete Sine Transform (IDST) is proposed. This new design approach …

A new VLSI algorithm for a high-throughput implementation of type IV DCT

DF Chiper - 2016 International Conference on Communications …, 2016 - ieeexplore.ieee.org
A new design approach based on a new VLSI algorithm for high speed applications of a
prime length type IV discrete cosine transform that uses short length cycle convolution …

An improved VLSI algorithm for an efficient VLSI implementation of a type IV DCT that allows an efficient incorporation of hardware security with a low overhead

DF Chiper - Electronics, 2023 - mdpi.com
This paper aims to solve one of the most challenging problems in designing VLSI chips for
common goods, namely an efficient incorporation of security techniques while maintaining …

Field programmable gate array implementation of spectrum allocation technique for cognitive radio networks

KK Anumandla, R Peesapati, SL Sabat - Computers & Electrical …, 2015 - Elsevier
Cognitive radio is an emerging technology in wireless communications for dynamically
accessing under-utilized spectrum resources. In order to maximize the network utilization …

A low complexity algorithm for the VLSI implementation of DST based on band-correlation structures

DF Chiper, LT Cotorobai - 2019 International Symposium on …, 2019 - ieeexplore.ieee.org
In this paper a low complexity algorithm for the VLSI implementation of DST based on band-
correlation structures is presented. The proposed algorithm presents a low arithmetic …

A structured fast algorithm for the VLSI pipeline implementation of inverse discrete cosine transform

DF Chiper - Circuits, Systems, and Signal Processing, 2021 - Springer
The forward and inverse DCT has many applications in digital signal processing area, but,
due to its high arithmetic complexity, it is necessary to find efficient software implementations …