CMOS leakage and power reduction in transistors and circuits: process and layout considerations

EN Shauly - Journal of Low Power Electronics and Applications, 2012 - mdpi.com
Power reduction in CMOS platforms is essential for any application technology. This is a
direct result of both lateral scaling—smaller features at higher density, and vertical scaling …

A generalized channel router

DW Hightower, RL Boyd - Proceedings of the 17th Design Automation …, 1980 - dl.acm.org
A “generalized” channel router operates on horizontal and vertical channels generated from
an irregular cell structure, and is free of a routing grid. Such a router can solve virtually any …

Detection of transient faults in nanometer technologies by using modular built-in current sensors

FS Torres, RP Bastos - Journal of Integrated Circuits and Systems, 2013 - jics.org.br
Soft error resilience is an increasingly important requirement of integrated circuits realized in
CMOS nanometer technologies. Among the several approaches, Bulk Built-in Current …

Towards high-sensitive built-in current sensors enabling detection of radiation-induced soft errors

R de Oliveira Rocha, FS Torres, RP Bastos - Microelectronics Reliability, 2017 - Elsevier
Soft error resilience is an increasingly important requirement of integrated circuits realized in
CMOS nanometer technologies. Among the several approaches, Bulk Built-in Current …

Robust modular bulk built-in current sensors for detection of transient faults

FS Torres, RP Bastos - 2012 25th Symposium on Integrated …, 2012 - ieeexplore.ieee.org
Soft error resilience is an increasingly important requirement of integrated circuits realized in
CMOS nanometer technologies. Among the several approaches, Bulk Built-in Current …

[BOOK][B] On-Chip Current Sensors for Reliable, Secure, and Low-Power Integrated Circuits

RP Bastos, FS Torres - 2020 - Springer
Many types of new-generation electronics systems surround nowadays our lives, providing
solutions, utilities, and conveniences we had never experimented before. Biomedical …

Encountering gate oxide breakdown with shadow transistors to increase reliability

C Cornelius, F Sill, H Sämrow, J Salzmann… - Proceedings of the 21st …, 2008 - dl.acm.org
Device scaling has enabled continuous performance increase of integrated circuits.
However, severe reliability and yield concerns are arising against the background of …

ULS: A dual-Vth/high-κ nano-CMOS universal level shifter for system-level power management

SP Mohanty, DK Pradhan - ACM Journal on Emerging Technologies in …, 2008 - dl.acm.org
Power dissipation is a major bottleneck for emerging applications, such as implantable
systems, digital cameras, and multimedia processors. Each of these applications is …

A Dual Oxide CMOS Universal Voltage Converter for Power Management in Multi-VDD SoCs

D Ghai, SP Mohanty… - … Symposium on Quality …, 2008 - ieeexplore.ieee.org
Level converters are becoming overhead for the circuits they are being employed in. If their
power consumption continues to grow, they will fail to serve the very purpose they were built …

Variability-aware optimization of nano-CMOS Active Pixel Sensors using design and analysis of Monte Carlo experiments

D Ghai, SP Mohanty… - 2009 10th International …, 2009 - ieeexplore.ieee.org
We propose a novel design f ow for mismatch and processvariation aware optimization of
nanoscale CMOS Active Pixel Sensor (APS) arrays. As a case study, an 8× 8 APS array is …