GARNET: A detailed on-chip network model inside a full-system simulator
Until very recently, microprocessor designs were computation-centric. On-chip
communication was frequently ignored. This was because of fast, single-cycle on-chip …
communication was frequently ignored. This was because of fast, single-cycle on-chip …
A survey of emerging interconnects for on-chip efficient multicast and broadcast in many-cores
Networks-on-chip (NoC) have emerged to tackle different on-chip communication
challenges and can satisfy different demands in terms of performance, cost and reliability …
challenges and can satisfy different demands in terms of performance, cost and reliability …
A scalable micro wireless interconnect structure for CMPs
This paper describes an unconventional way to apply wireless networking in emerging
technologies. It makes the case for using a two-tier hybrid wireless/wired architecture to …
technologies. It makes the case for using a two-tier hybrid wireless/wired architecture to …
Customizable domain-specific computing
To meet computing needs and overcome power density limitations, the computing industry
has entered the era of parallelization. However, highly parallel, general-purpose computing …
has entered the era of parallelization. However, highly parallel, general-purpose computing …
A systematic analysis of power saving techniques for wireless network-on-chip architectures
Wireless network-on-chip (WNoC, aka WiNoC) architectures, as an emerging and viable
alternative approach, overcome the communication constraints and drawbacks of network …
alternative approach, overcome the communication constraints and drawbacks of network …
Minimizing average shortest path distances via shortcut edge addition
A Meyerson, B Tagiku - International Workshop on Approximation …, 2009 - Springer
We consider adding k shortcut edges (ie edges of small fixed length δ≥ 0) to a graph so as
to minimize the weighted average shortest path distance over all pairs of vertices. We …
to minimize the weighted average shortest path distance over all pairs of vertices. We …
A resilient 2-D waveguide communication fabric for hybrid wired-wireless NoC design
Hybrid wired-wireless Network-on-Chip (WiNoC) has emerged as an alternative solution to
the poor scalability and performance issues of conventional wireline NoC design for future …
the poor scalability and performance issues of conventional wireline NoC design for future …
Thermal and performance efficient on-chip surface-wave communication for many-core systems in dark silicon era
Due to the exceedingly high integration density of VLSI circuits and the resulting high power
density, thermal integrity became a major challenge. One way to tackle this problem is Dark …
density, thermal integrity became a major challenge. One way to tackle this problem is Dark …
Exploiting heterogeneity for energy efficiency in chip multiprocessors
Heterogeneous multicores are envisioned to be a promising design paradigm to combat
today's challenges of power, memory, and reliability walls that are impeding chip design …
today's challenges of power, memory, and reliability walls that are impeding chip design …
Exploiting new interconnect technologies in on-chip communication
The continuing scaling of transistors has increased the number of cores available in current
processors, and the number of cores is expected to continue to increase. In such many core …
processors, and the number of cores is expected to continue to increase. In such many core …