Hardware transactions or other techniques, such as custom PCIe handling devices, are
used to atomically move pages from one host's memory to another host's memory. The hosts …

(57) ABSTRACT A method is described. The method includes receiving notice of a page
fault. A page targeted by a memory access instruction that resulted in the page fault residing …

Examples described herein relate to memory thin provision ing in a memory pool of one or
more dual in-line memory modules or memory devices. At any instance, any central …

(57) ABSTRACT A model generation apparatus according to an embodiment includes a
processor circuit. The processor circuit is con figured to: divide time-series data of operation …

(Continued) Primary Examiner Hiep T Nguyen (74) Attorney, Agent, or Firm Konrad Raynes
Davda & Victor LLP; William K. Konrad (57) ABSTRACT In one aspect of multi-mode …

(57) ABSTRACT A data storage apparatus may include a first memory device comprising a
first area in which write data from a host device are stored and a second area, a second …

Hardware transactions or other techniques, such as custom PCIe handling devices, are
used to atomically move pages from one host's memory to another host's memory. The hosts …

Hardware transactions or other techniques, such as custom PCIe handling devices, are
used to atomically move pages from one hoses memory to another hoses memory. The …

Load store addressing can include a processor, which fuses two consecutive instruction
determined to be prefix instruc tions and treats the two instructions as a single fused …

A method for demoting data from a cache comprising heterogeneous memory types is
disclosed. The method maintains for a data element in the cache, a write access count that is …