Modern development methods and tools for embedded reconfigurable systems: A survey

L Jóźwiak, N Nedjah, M Figueroa - Integration, 2010 - Elsevier
Heterogeneous reconfigurable systems provide drastically higher performance and lower
power consumption than traditional CPU-centric systems. Moreover, they do it at much lower …

Ingredients of adaptability: a survey of reconfigurable processors

A Chattopadhyay - VLSI Design, 2013 - Wiley Online Library
For a design to survive unforeseen physical effects like aging, temperature variation, and/or
emergence of new application standards, adaptability needs to be supported. Adaptability …

The MOLEN polymorphic processor

S Vassiliadis, S Wong, G Gaydadjiev… - IEEE transactions on …, 2004 - ieeexplore.ieee.org
In this paper, we present a polymorphic processor paradigm incorporating both general-
purpose and custom computing processing. The proposal incorporates an arbitrary number …

A classification of memory-centric computing

HAD Nguyen, J Yu, MA Lebdeh, M Taouil… - ACM Journal on …, 2020 - dl.acm.org
Technological and architectural improvements have been constantly required to sustain the
demand of faster and cheaper computers. However, CMOS down-scaling is suffering from …

FPGA vs. ASIC for low power applications

A Amara, F Amiel, T Ea - Microelectronics journal, 2006 - Elsevier
Field Programmable Gate Array (FPGA) are becoming more and more popular and are used
in many applications. However, it is well known that the performance is limited comparing to …

ρ-VEX: A reconfigurable and extensible softcore VLIW processor

S Wong, T Van As, G Brown - 2008 International Conference on …, 2008 - ieeexplore.ieee.org
This paper presents the architectural design of a reconfigurable and extensible very long
instruction word (VLIW) processor. In addition to architectural extensibility, our processor …

Test generation in VLSI circuits for crosstalk noise

W Chen, SK Gupta, MA Breuer - Proceedings International Test …, 1998 - ieeexplore.ieee.org
This paper addresses the problem of efficiently and accurately generating two-vector tests
for crosstalk induced effects, such as pulses, signal speedup and slowdown, in digital …

[ΒΙΒΛΙΟ][B] Processor design: system-on-chip computing for ASICs and FPGAs

J Nurmi - 2007 - books.google.com
Processor Design addresses the design of different types of embedded, firmware-
programmable computation engines. Because the design and customization of embedded …

Evaluating programmable architectures for imaging and vision applications

A Vasilyev, N Bhagdikar, A Pedram… - 2016 49th Annual …, 2016 - ieeexplore.ieee.org
Algorithms for computational imaging and computer vision are rapidly evolving, and
hardware must follow suit: the next generation of image signal processors (ISPs) must be …

A Survey of Coarse-Grain Reconfigurable Architectures and Cad Tools: Basic Definitions, Critical Design Issues and Existing Coarse-grain Reocnfigurable Systems

G Theodoridis, D Soudris, S Vassiliadis - Fine-and Coarse-Grain …, 2007 - Springer
According to the granularity of configuration, reconfigurable systems are classified in two
categories, which are the fine-and coarse-grain ones. The purpose of this chapter is to study …