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Routing flits in a network-on-chip based on operating states of routers
S Bharadwaj, SN Das - US Patent 10,944,693, 2021 - Google Patents
(57) ABSTRACT A system is described that includes an integrated circuit chip having a
network-on-chip. The network-on-chip includes multiple routers arranged in a topology and …
network-on-chip. The network-on-chip includes multiple routers arranged in a topology and …
Network on-chip topology generation
The present disclosure provides a computer-based method and system for synthesizing a
NoC. Physical data, device data, bridge data and traffic data are determined based on an …
NoC. Physical data, device data, bridge data and traffic data are determined based on an …
Network-on-chip element placement
The present disclosure provides a computer-based method and system for synthesizing a
Network-on-Chip (NOC). Physical data, device data, bridge data and traffic data are …
Network-on-Chip (NOC). Physical data, device data, bridge data and traffic data are …
Network-on-Chip topology generation
NSH Gade, HHVNA Prasad, A Gangwar… - US Patent …, 2022 - Google Patents
The present disclosure provides computer-based methods and a system for synthesizing a
NoC that advantageously generate balanced NoC topologies without end-to-end fair ness or …
NoC that advantageously generate balanced NoC topologies without end-to-end fair ness or …
Independent control of power, clock, and/or reset signals to a partitioned node
GD Cudak, M Shah, PS Patel, J Parsonese - US Patent 12,099,391, 2024 - Google Patents
A partitionable multi-processor system includes a first plurality of components of the multi-
processor system forming a first partitioned node that is operable as a first independent …
processor system forming a first partitioned node that is operable as a first independent …
Network-on-chip topology generation
The present disclosure provides a computer-based method and system for synthesizing a
NoC. Traffic data is deter mined or received, and a baseline topology is generated or …
NoC. Traffic data is deter mined or received, and a baseline topology is generated or …
Network-on-chip topology generation
The present disclosure provides a computer-based method and system for synthesizing a
NoC. Physical data, device data, bridge data and traffic data are determined based on an …
NoC. Physical data, device data, bridge data and traffic data are determined based on an …
Integrated circuit design and fabrication
SJ Salisbury, Z Xu, AB Laughton, CF Brej - US Patent 10,796,040, 2020 - Google Patents
A method comprises generating, using a computer, an inte grated circuit layout including a
plurality of data handling nodes interconnected by routing circuitry defining data packet …
plurality of data handling nodes interconnected by routing circuitry defining data packet …
System and method for reducing silicon area of resilient systems using functional and duplicate logic
KC JANAC - US Patent App. 16/236,350, 2020 - Google Patents
BACKGROUND to an external safety controller. In accordance with an embodiment of the
invention, packet assembly and disas sembly buffers are duplicated. In accordance with an …
invention, packet assembly and disas sembly buffers are duplicated. In accordance with an …
Integrated circuit design
(57) ABSTRACT A computer-implemented method of integrated circuit design comprises:
using a computer, detecting data commu nication paths and associated data traffic …
using a computer, detecting data commu nication paths and associated data traffic …