A survey on optical network-on-chip architectures

S Werner, J Navaridas, M Luján - ACM Computing Surveys (CSUR), 2017 - dl.acm.org
Optical on-chip data transmission enabled by silicon photonics (SiP) is widely considered a
key technology to overcome the bandwidth and energy limitations of electrical interconnects …

[PDF][PDF] AlGaInP optical source integrated with fiber links and silicon avalanche photo detectors in fiber optic systems

MMA Eid, S Urooj, NM Alwadai… - Indones J Electr Eng …, 2021 - researchgate.net
This study has clarified aluminium gallium indium phosphide (AlGaInP) optical source
integrated with fiber links and silicon avalanche photodetectors in fiber optic systems. The …

Opportunities and challenges of using plasmonic components in nanophotonic architectures

HMG Wassel, D Dai, M Tiwari… - IEEE Journal on …, 2012 - ieeexplore.ieee.org
Nanophotonic architectures have recently been proposed as a path to providing low latency,
high bandwidth network-on-chips. These proposals have primarily been based on micro …

Designing chip-level nanophotonic interconnection networks

C Batten, A Joshi, V Stojanovć, K Asanović - … Interconnect Architectures for …, 2012 - Springer
Technology scaling will soon enable high-performance processors with hundreds of cores
integrated onto a single die, but the success of such systems could be limited by the …

Chip-scale silicon photonic interconnects: A formal study on fabrication non-uniformity

M Nikdast, G Nicolescu, J Trajkovic… - Journal of Lightwave …, 2016 - opg.optica.org
Silicon photonic interconnect (SPI) is an attractive alternative for the power-hungry and low-
bandwidth metallic interconnect in multiprocessor systems-on-chip (MPSoCs). When …

METEOR: Hybrid photonic ring-mesh network-on-chip for multicore architectures

S Bahirat, S Pasricha - ACM Transactions on Embedded Computing …, 2014 - dl.acm.org
With increasing application complexity and improvements in process technology, Chip
MultiProcessors (CMPs) with tens to hundreds of cores on a chip are becoming a reality …

Thermal design and constraints for heterogeneous integrated chip stacks and isolation technology using air gap and thermal bridge

Y Zhang, Y Zhang, MS Bakir - IEEE Transactions on …, 2014 - ieeexplore.ieee.org
This paper summarizes the thermal challenges in conventional 3-D stacks and proposes a
novel stacking structure that eases the thermal problem. The objective of this paper is first to …

LIBRA: Thermal and process variation aware reliability management in photonic networks-on-chip

IG Thakkar, S Pasricha - IEEE Transactions on Multi-Scale …, 2018 - ieeexplore.ieee.org
Silicon nanophotonics technology is being considered for future networks-on-chip (NoCs) as
it can enable high bandwidth density and lower latency with traversal of data at the speed of …

Thermal management of manycore systems with silicon-photonic networks

T Zhang, JL Abellán, A Joshi… - … Design, Automation & …, 2014 - ieeexplore.ieee.org
Silicon-photonic network-on-chips (NoCs) provide high bandwidth density; therefore, they
are promising candidates to replace electrical NoCs in manycore systems. The silicon …

Tolerating process variations in nanophotonic on-chip networks

Y Xu, J Yang, R Melhem - ACM SIGARCH Computer Architecture News, 2012 - dl.acm.org
Nanophontonic networks, a potential candidate for future networks on-chip, have been
challenged for their reliability due to several device-level limitations. One of the main issues …