A survey of FPGA and ASIC designs for transformer inference acceleration and optimization

BJ Kang, HI Lee, SK Yoon, YC Kim, SB Jeong… - Journal of Systems …, 2024 - Elsevier
Recently, transformer-based models have achieved remarkable success in various fields,
such as computer vision, speech recognition, and natural language processing. However …

AccelTran: A sparsity-aware accelerator for dynamic inference with transformers

S Tuli, NK Jha - IEEE Transactions on Computer-Aided Design …, 2023 - ieeexplore.ieee.org
Self-attention-based transformer models have achieved tremendous success in the domain
of natural language processing. Despite their efficacy, accelerating the transformer is …

Hardware accelerator design for sparse dnn inference and training: A tutorial

W Mao, M Wang, X **e, X Wu… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
Deep neural networks (DNNs) are widely used in many fields, such as artificial intelligence
generated content (AIGC) and robotics. To efficiently support these tasks, the model pruning …

EdgeTran: Device-aware co-search of transformers for efficient inference on mobile edge platforms

S Tuli, NK Jha - IEEE Transactions on Mobile Computing, 2023 - ieeexplore.ieee.org
Automated design of efficient transformer models has recently attracted significant attention
from industry and academia. However, most works only focus on certain metrics while …

EdgeTran: Co-designing transformers for efficient inference on mobile edge platforms

S Tuli, NK Jha - arxiv preprint arxiv:2303.13745, 2023 - arxiv.org
Automated design of efficient transformer models has recently attracted significant attention
from industry and academia. However, most works only focus on certain metrics while …

TransCODE: Co-design of transformers and accelerators for efficient training and inference

S Tuli, NK Jha - IEEE Transactions on Computer-Aided Design …, 2023 - ieeexplore.ieee.org
Automated co-design of machine learning models and evaluation hardware is critical for
efficiently deploying such models at scale. Despite the state-of-the-art performance of …

A review of bayesian methods in electronic design automation

Z Gao, DS Boning - arxiv preprint arxiv:2304.09723, 2023 - arxiv.org
The utilization of Bayesian methods has been widely acknowledged as a viable solution for
tackling various challenges in electronic integrated circuit (IC) design under stochastic …

[HTML][HTML] A Coarse-and Fine-Grained Co-Exploration Approach for Optimizing DNN Spatial Accelerators: Improving Speed and Performance

H Sun, J Shen, C Zhang, H Liu - Electronics, 2025 - mdpi.com
The rapid advancement of deep neural networks has significantly increased demands for
computational complexity and data volume. This trend is especially evident with the …

Scratchpad Memory Management for Deep Learning Accelerators

S Zouzoula, MA Maleki, MW Azhar… - Proceedings of the 53rd …, 2024 - dl.acm.org
The success of Artificial Intelligence (AI) applications is driven by efficient hardware
accelerators. Recent trends show a rapid increase in the application demands, which in …

BREATHE: Second-Order Gradients and Heteroscedastic Emulation based Design Space Exploration

S Tuli, NK Jha - arxiv preprint arxiv:2308.08666, 2023 - arxiv.org
Researchers constantly strive to explore larger and more complex search spaces in various
scientific studies and physical experiments. However, such investigations often involve …