Understanding reduced-voltage operation in modern DRAM devices: Experimental characterization, analysis, and mechanisms

KK Chang, AG Yağlıkçı, S Ghose, A Agrawal… - Proceedings of the …, 2017 - dl.acm.org
The energy consumption of DRAM is a critical concern in modern computing systems.
Improvements in manufacturing process technology have allowed DRAM vendors to lower …

[PDF][PDF] Research problems and opportunities in memory systems

O Mutlu, L Subramanian - Supercomputing frontiers and innovations, 2014 - superfri.org
The memory system is a fundamental performance and energy bottleneck in almost all
computing systems. Recent system design, application, and technology trends that require …

ChargeCache: Reducing DRAM latency by exploiting row access locality

H Hassan, G Pekhimenko, N Vijaykumar… - … Symposium on High …, 2016 - ieeexplore.ieee.org
DRAM latency continues to be a critical bottleneck for system performance. In this work, we
develop a low-cost mechanism, called Charge Cache, that enables faster access to recently …

Load value approximation

J San Miguel, M Badr, NE Jerger - 2014 47th Annual IEEE …, 2014 - ieeexplore.ieee.org
Approximate computing explores opportunities that emerge when applications can tolerate
error or inexactness. These applications, which range from multimedia processing to …

Cameo: A two-level memory organization with capacity of main memory and flexibility of hardware-managed cache

CC Chou, A Jaleel, MK Qureshi - 2014 47th Annual IEEE/ACM …, 2014 - ieeexplore.ieee.org
This paper analyzes the trade-offs in architecting stacked DRAM either as part of main
memory or as a hardware-managed cache. Using stacked DRAM as part of main memory …

Characterizing application memory error vulnerability to optimize datacenter cost via heterogeneous-reliability memory

Y Luo, S Govindan, B Sharma… - 2014 44th Annual …, 2014 - ieeexplore.ieee.org
Memory devices represent a key component of datacenter total cost of ownership (TCO),
and techniques used to reduce errors that occur on these devices increase this cost. Existing …

Page placement strategies for GPUs within heterogeneous memory systems

N Agarwal, D Nellans, M Stephenson… - Proceedings of the …, 2015 - dl.acm.org
Systems from smartphones to supercomputers are increasingly heterogeneous, being
composed of both CPUs and GPUs. To maximize cost and energy efficiency, these systems …

A survey of phase change memory systems

F **a, DJ Jiang, J **ong, NH Sun - Journal of Computer Science and …, 2015 - Springer
As the scaling of applications increases, the demand of main memory capacity increases in
order to serve large working set. It is difficult for DRAM (dynamic random access memory) …

Utility-based hybrid memory management

Y Li, S Ghose, J Choi, J Sun, H Wang… - … Conference on Cluster …, 2017 - ieeexplore.ieee.org
While the memory footprints of cloud and HPC applications continue to increase,
fundamental issues with DRAM scaling are likely to prevent traditional main memory …

Panthera: Holistic memory management for big data processing over hybrid memories

C Wang, H Cui, T Cao, J Zigman, H Volos… - Proceedings of the 40th …, 2019 - dl.acm.org
Modern data-parallel systems such as Spark rely increasingly on in-memory computing that
can significantly improve the efficiency of iterative algorithms. To process real-world …