Multiscalar processors use a new, aggressive implementation paradigm for extracting large
quantities of instruction level parallelism from ordinary high level language programs. A …

Dynamic branch predictors are popular because they can deliver accurate branch prediction
without changes to the instruction set architecture or pre existing binaries. However, to …

Modern online services are shifting away from monolithic applications to loosely-coupled
microservices because of their improved scalability, reliability, programmability and …

One can effectively utilize predicated execution to improve branch handling in instruction-
level parallel processors. Although the potential benefits of predicated execution are high …

Explicitly Parallel Instruction Computing (EPIC) architectures require the compiler to express
program instruction level parallelism directly to the hardware. EPIC techniques which enable …

Many algorithms schedule their work, or tasks, according to a priority order for correctness or
faster convergence. While priority schedulers commonly implement task enqueue and …

Predicated execution is a promising architectural feature for exploiting instruction-level
parallelism in the presence of control flow. Compiling for predicated execution involves …

Branch instructions are recognized as a major impediment to exploiting instruction level
parallelism. Even with sophisticated branch prediction techniques, many frequently …

The first step towards the design of video processors and systems is to achieve an
understanding of the major applications, including not only the theory, but also the workload …

Single-program speculative multithreading (SPSM) architecture | Proceedings of the IFIP
WG10.3 working conference on Parallel architectures and compilation techniques skip to main …