[PDF][PDF] System generator: The state-of-art FPGA design tool for dsp applications

S Mittal, S Gupta, S Dasgupta - Third International Innovative …, 2008 - academia.edu
Digital signal processing functions have traditionally been implemented on programmable
platform of DSPs. However, as the needs of many computationally intensive applications are …

A comparison between DSP and FPGA platforms for real-time imaging applications

M Shirvaikar, T Bushnaq - Real-Time Image and Video …, 2009 - spiedigitallibrary.org
Real-time applications impose serious demands on hardware size, time deadlines, power
dissipation, and cost of the solution. A typical system may also require modification of …

Optimal and heuristic approaches to modulo scheduling with rational initiation intervals in hardware synthesis

P Sittel, N Fiege, J Wickerson… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
A well-known approach for generating custom hardware with high throughput and low
resource usage is modulo scheduling, in which the number of clock cycles between …

Intellectual property protection (IPP) using obfuscation in C, VHDL, and verilog coding

U Meyer-Bäse, E Castillo, G Botella… - Independent …, 2011 - spiedigitallibrary.org
One of the big challenges in the design of embedded systems today is how to combine
design reuse and intellectual property protection (IPP). Strong IP schemes such as hardware …

Optimal binding and port assignment for loop pipelining in high-level synthesis

N Fiege, P Sittel, P Zipf - 2022 32nd International Conference …, 2022 - ieeexplore.ieee.org
In order to provide high throughput for custom hardware implementations, academic and
commercial high-level synthesis (HLS) tools use loop pipelining by modulo scheduling …

An undergraduate course and laboratory in digital signal processing with field programmable gate arrays

U Meyer-Bäse, A Vera, A Meyer-Bäse… - IEEE Transactions …, 2010 - ieeexplore.ieee.org
In this paper, an innovative educational approach to introducing undergraduates to both
digital signal processing (DSP) and field programmable gate array (FPGA)-based design in …

[BUCH][B] A dynamic arithmetic architecture: precision, power and performance considerations

GA Vera - 2008 - search.proquest.com
Reconfigurable logic devices are widely used within the scientific computing community as
hardware accelerators. This is due to their ability to implement parallel structures and to …

Real-time fetal ECG system design using embedded microprocessors

U Meyer-Baese, H Muddu, S Schinhaerl… - … for Biomedical and …, 2016 - spiedigitallibrary.org
The emphasis of this project lies in the development and evaluation of new robust and high
fidelity fetal electrocardiogram (FECG) systems to determine the fetal heart rate (FHR) …

An FPGA-based rapid prototy** platform for wavelet coprocessors

A Vera, U Meyer-Baese… - … Nano-Biomimetic Sensors …, 2007 - spiedigitallibrary.org
MatLab/Simulink-based design flows are being used by DSP designers to improve time-to-
market of FPGA implementations. 1 Commonly, digital signal processing cores are …

Filtering out spikes from sensors in power converters system using discrete wavelet transform

H Mohammad, CP Diduch, Y Biletskiy… - 2012 25th IEEE …, 2012 - ieeexplore.ieee.org
Power converters are widely used to control the power energy generated by distributed
generators in power grids. The operation of power converters involves monitoring and …