Sextans: A streaming accelerator for general-purpose sparse-matrix dense-matrix multiplication
Sparse-Matrix Dense-Matrix multiplication (SpMM) is the key operator for a wide range of
applications including scientific computing, graph processing, and deep learning …
applications including scientific computing, graph processing, and deep learning …
{FpgaNIC}: An {FPGA-based} versatile 100gb {SmartNIC} for {GPUs}
Given that the increasing rate of network bandwidth is far ahead of that of the compute
capacity of host CPU, which by default processes network packets, SmartNIC has been …
capacity of host CPU, which by default processes network packets, SmartNIC has been …
ReGraph: Scaling graph processing on HBM-enabled FPGAs with heterogeneous pipelines
The use of FPGAs for efficient graph processing has attracted significant interest. Recent
memory subsystem upgrades including the introduction of HBM in FPGAs promise to further …
memory subsystem upgrades including the introduction of HBM in FPGAs promise to further …
Automatic creation of high-bandwidth memory architectures from domain-specific languages: The case of computational fluid dynamics
Numerical simulations can help solve complex problems. Most of these algorithms are
massively parallel and thus good candidates for FPGA acceleration thanks to spatial …
massively parallel and thus good candidates for FPGA acceleration thanks to spatial …
ThunderGP: Resource-efficient graph processing framework on FPGAs with HLS
FPGA has been an emerging computing infrastructure in datacenters benefiting from fine-
grained parallelism, energy efficiency, and reconfigurability. Meanwhile, graph processing …
grained parallelism, energy efficiency, and reconfigurability. Meanwhile, graph processing …
Near-memory computing on fpgas with 3d-stacked memories: Applications, architectures, and optimizations
The near-memory computing (NMC) paradigm has transpired as a promising method for
overcoming the memory wall challenges of future computing architectures. Modern systems …
overcoming the memory wall challenges of future computing architectures. Modern systems …
Exploiting HBM on FPGAs for data processing
Field Programmable Gate Arrays (FPGAs) are increasingly being used in data centers and
the cloud due to their potential to accelerate certain workloads as well as for their …
the cloud due to their potential to accelerate certain workloads as well as for their …
ScalaBFS2: A High-performance BFS Accelerator on an HBM-enhanced FPGA Chip
K Li, S Xu, Z Shao, R Zheng, X Liao, H ** - ACM Transactions on …, 2024 - dl.acm.org
The introduction of High Bandwidth Memory (HBM) to the FPGA chip makes it possible for
an FPGA-based accelerator to leverage the huge memory bandwidth of HBM to improve its …
an FPGA-based accelerator to leverage the huge memory bandwidth of HBM to improve its …
NeuroTAP: Thermal and Memory Access Pattern-Aware Data Map** on 3D DRAM for Maximizing DNN Performance
Deep neural networks (DNNs) have been widely adopted, owing to break-through
performance and high accuracy. DNNs exhibit varying memory behavior involving specific …
performance and high accuracy. DNNs exhibit varying memory behavior involving specific …
DmRPC: Disaggregated Memory-aware Datacenter RPC for Data-intensive Applications
Modern datacenter applications are increasingly being built using a microservices
architecture. These microservices communicate with each other using datacenter RPCs …
architecture. These microservices communicate with each other using datacenter RPCs …