Given that the increasing rate of network bandwidth is far ahead of that of the compute
capacity of host CPU, which by default processes network packets, SmartNIC has been …

Sparse-Matrix Dense-Matrix multiplication (SpMM) is the key operator for a wide range of
applications including scientific computing, graph processing, and deep learning …

The use of FPGAs for efficient graph processing has attracted significant interest. Recent
memory subsystem upgrades including the introduction of HBM in FPGAs promise to further …

Recently, algorithm-hardware (HW) co-exploration for neural networks (NNs) has become
the key to obtaining high-quality solutions. However, previous efforts for field-programmable …

The near-memory computing (NMC) paradigm has transpired as a promising method for
overcoming the memory wall challenges of future computing architectures. Modern systems …

Numerical simulations can help solve complex problems. Most of these algorithms are
massively parallel and thus good candidates for FPGA acceleration thanks to spatial …

On FPGAs, customizing data parallelism can significantly improve performances of
applications. However, a large number of applications, such as sparse matrix multiplication …

FPGA has been an emerging computing infrastructure in datacenters benefiting from fine-
grained parallelism, energy efficiency, and reconfigurability. Meanwhile, graph processing …

Field Programmable Gate Arrays (FPGAs) are increasingly being used in data centers and
the cloud due to their potential to accelerate certain workloads as well as for their …

The introduction of High Bandwidth Memory (HBM) to the FPGA chip makes it possible for
an FPGA-based accelerator to leverage the huge memory bandwidth of HBM to improve its …