Emerging energy-efficient biosignal-dedicated circuit techniques: A tutorial brief
High spatiotemporal resolution biosignal that is vital for biomedical applications results in an
information bottleneck that poses challenges for their transferring and processing. The …
information bottleneck that poses challenges for their transferring and processing. The …
Design of high hardware efficiency approximate floating-point FFT processor
C Yan, X Zhao, T Zhang, J Ge… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
The Fast Fourier Transformation (FFT), as a high-efficiency algorithm of the Discrete Fourier
Transform (DFT), is widely used in Digital Signal Processing (DSP), wireless communication …
Transform (DFT), is widely used in Digital Signal Processing (DSP), wireless communication …
An area efficient vedic multiplier for FFT processor implementation using 4-2 compressor adder
S Dhanasekar - International Journal of Electronics, 2024 - Taylor & Francis
This article proposes a compact compressor adder of Vedic multiplication for an area-
efficient FFT architecture. A standard multi-radix-24, 22, 23 FFT with a single-path delay …
efficient FFT architecture. A standard multi-radix-24, 22, 23 FFT with a single-path delay …
Energy-quality scalable design space exploration of approximate FFT hardware architectures
PTL Pereira, PÜL da Costa… - … on Circuits and …, 2022 - ieeexplore.ieee.org
This paper presents a comprehensive design space exploration for boosting energy
efficiency of a fast Fourier transform (FFT) VLSI accelerator, exploiting several approximate …
efficiency of a fast Fourier transform (FFT) VLSI accelerator, exploiting several approximate …
A novel digital logic for bit reversal and address generations in FFT computations
K Elango, K Muniandi - Wireless Personal Communications, 2023 - Springer
Abstract The Fast Fourier Transform and Inverse Fast Fourier Transform are high efficient
algorithm that have wide a range of Digital Signal Processing (DSP) and telecommunication …
algorithm that have wide a range of Digital Signal Processing (DSP) and telecommunication …
Design of proficient two operand adder using hybrid carry select adder with FPGA implementation
In every modern ICs the adders are essential components. Adder's performance has a
substantial impact on the architecture of signal processing, controller, the module of filter, the …
substantial impact on the architecture of signal processing, controller, the module of filter, the …
STQCA-FFT: A fast fourier transform architecture using stack-type QCA approach with power and delay reduction
Abstract Quantum-dot Cellular Automata (QCA) is a novel and fast-growing nanotechnology
that is used to build VLSI circuits. This paradigm has proven to be the fastest among various …
that is used to build VLSI circuits. This paradigm has proven to be the fastest among various …
Low‐power fast Fourier transform hardware architecture combining a split‐radix butterfly and efficient adder compressors
Fast Fourier transform (FFT) is the most common low‐complexity implementation of the
discrete Fourier transform, intensively employed to process real‐world signals in smart …
discrete Fourier transform, intensively employed to process real‐world signals in smart …
BFT—Low-Latency Bit-Slice Design of Discrete Fourier Transform
Structures for the evaluation of fast Fourier transforms are important components in several
signal-processing applications and communication systems. Their capabilities play a key …
signal-processing applications and communication systems. Their capabilities play a key …
Design optimisation of multiplier‐free parallel pipelined FFT on field programmable gate array
Fast Fourier transform (FFT) is utilised to minimise the complexity of discrete Fourier
transform by converting signals from frequency domain to time domain and conversely …
transform by converting signals from frequency domain to time domain and conversely …