Field programmable gate array applications—A scientometric review

J Ruiz-Rosero, G Ramirez-Gonzalez, R Khanna - Computation, 2019 - mdpi.com
Field Programmable Gate Array (FPGA) is a general purpose programmable logic device
that can be configured by a customer after manufacturing to perform from a simple logic gate …

FPGA-based real-time epileptic seizure classification using Artificial Neural Network

R Sarić, D Jokić, N Beganović, LG Pokvić… - … Signal Processing and …, 2020 - Elsevier
Epilepsy is a neurological disorder characterised by unusual brain activity widely known as
seizure affecting 4-7% of the world's population. The diagnosis of this disorder is currently …

Human performance modification: Review of worldwide research with a view to the future

National Research Council, Division of Behavioral… - 2012 - books.google.com
The development of technologies to modify natural human physical and cognitive
performance is one of increasing interest and concern, especially among military services …

Low cost interconnected architecture for the hardware spiking neural networks

Y Luo, L Wan, J Liu, J Harkin, L McDaid… - Frontiers in …, 2018 - frontiersin.org
A novel low cost interconnected architecture (LCIA) is proposed in this paper, which is an
efficient solution for the neuron interconnections for the hardware spiking neural networks …

Spiking neural networks for breast cancer classification in a dielectrically heterogeneous breast

M O'Halloran, B McGinley, RC Conceicao… - Progress In …, 2011 - jpier.org
The considerable overlap in the dielectric properties of benign and malignant tissue at
microwave frequencies means that breast tumour classification using traditional UWB Radar …

Modular neural tile architecture for compact embedded hardware spiking neural network

S Pande, F Morgan, S Cawley, T Bruintjes, G Smit… - Neural processing …, 2013 - Springer
Biologically-inspired packet switched network on chip (NoC) based hardware spiking neural
network (SNN) architectures have been proposed as an embedded computing platform for …

Fixed latency on-chip interconnect for hardware spiking neural network architectures

S Pande, F Morgan, G Smit, T Bruintjes, J Rutgers… - Parallel computing, 2013 - Elsevier
Abstract Information in a Spiking Neural Network (SNN) is encoded as the relative timing
between spikes. Distortion in spike timings can impact the accuracy of SNN operation by …

[PDF][PDF] Indexed bibliography of genetic algorithms and neural networks

JT Alander - University of Vaasa, Department of Information …, 1994 - researchgate.net
An Indexed Bibliography of Genetic Algorithms and Neural Networks Page 1 An Indexed
Bibliography of Genetic Algorithms and Neural Networks compiled by Jarmo T. Alander …

Spiking neural networks for identification and control of dynamic plants

RH Abiyev, O Kaynak, Y Oniz - 2012 IEEE/ASME International …, 2012 - ieeexplore.ieee.org
In this paper a Spiking Neural Networks (SNN)-based model is developed for identification
and control of dynamic plants. Spike Response Model (SRM) has been employed to design …

EMBRACE-SysC for analysis of NoC-based spiking neural network architectures

S Pande, F Morgan, S Cawley… - … on System on Chip, 2010 - ieeexplore.ieee.org
This paper presents EMBRACE-SysC, a simulation-based design exploration framework for
the EMBRACE mixed signal Network on Chip (NoC)-based hardware Spiking Neural …