Testing of circuits became difficult as the scale of integration is increasing as said in Moore's
Law. Conventional testing approach is not sufficient with the growth of device counts and …

We present a novel method to efficiently generate, compress and apply test patterns in a
logic BIST architecture. Patterns are generated by a modified automatic test pattern …

Logic Built-In Self-Test (LBIST) is becoming a requirement for high-complexity, high-
reliability ICs which are increasingly used in the automotive field. Traditionally, LBIST can …

This paper presents a new X-blocking system which allows very high compression and full
coverage even if the density of unknown values is very high and varies every shift. Despite …

Recent test-cost reduction methods are based on controlling the initial state (seed) of a
pseudo-random pattern generator (PRPG) so that deterministic values are loaded in …

Vehicles are increasingly wirelessly connected and each wireless connection is a potential
cyber threat surface. Many of these wireless communications are related to the infotainment …

According to the Moore's Law, density of the circuit is increasing which results difficulty in
testing the circuit. Resource utilization, time required to test the circuit, power required to test …

This paper presents a new low power BIST TPG scheme. It uses a transition monitoring
window (TMW) that is comprised of a transition monitoring window block and a MUX. When …

In this paper, we will design and implement a programmable and parameterizable Linear
Feedback Shift Register (LFSR) for VLSI IC testing. The LFSR is used in circuit tests for test …

VLSI circuits are perceived to dissipate extra power during testing when compared with that
of the normal function. Drastic heat may reduce circuit consistency, shoot up package cost …