A highly stable reliable SRAM cell design for low power applications

S Pal, S Bose, WH Ki, A Islam - Microelectronics Reliability, 2020 - Elsevier
The growth in demand for power-efficient neural network accelerators has generated an
intense demand for low power static random access memory (SRAM). In this context, a …

Design of a stable low power 11-T static random access memory cell

A Sachdeva, VK Tomar - Journal of circuits, Systems and Computers, 2020 - World Scientific
In this paper, a 11-T static random-access memory (SRAM) cell has been examined that
shows a fair reduction in read power dissipation while upholding the stability and moderate …

Design of 10T SRAM cell with improved read performance and expanded write margin

A Sachdeva, VK Tomar - IET Circuits, Devices & Systems, 2021 - Wiley Online Library
The need of genuine processors operation improvement cultivates the necessity for reliable,
low power and fast memories. Several challenges follow this improvement at lower …

Design of low power half select free 10T static random-access memory cell

A Sachdeva, VK Tomar - Journal of Circuits, Systems and …, 2021 - World Scientific
This paper presents a circuit-level technique of designing a low power and half select free
10T Static Random-Access Memory Cell (SRAM). The proposed cell works with single end …

A Schmitt-trigger based low read power 12T SRAM cell

A Sachdeva, VK Tomar - Analog integrated circuits and signal processing, 2020 - Springer
In this article, a Schmitt trigger based 12-Transistors (ST12T) static random-access memory
(SRAM) bit-cell has been proposed. The Read Power of proposed cell is reduced by …

Pentavariate Analysis of a Subthreshold 10T SRAM Bit Cell With Variation Tolerant Write and Divided Bit-Line Read

S Gupta, K Gupta, N Pandey - IEEE Transactions on Circuits …, 2018 - ieeexplore.ieee.org
Subthreshold and near-threshold operations are viable approaches towards reducing both
static and dynamic power in Static Random Access Memory (SRAM). However, supply …

Design of a soft error hardened SRAM cell with improved access time for embedded systems

VK Tomar, A Sachdeva - Microprocessors and Microsystems, 2022 - Elsevier
Recent advancements in high-performance processor operation have nurtured the
requirement of low power, reliable, and fast static random-access memory (SRAM). Scaling …

Characterization of stable 12T SRAM with improved critical charge

A Sachdeva, VK Tomar - Journal of circuits, Systems and computers, 2022 - World Scientific
With the aggressive growth of the internet of things-based applications in the domestic and
industrial domain, the embedded static memory is also under renovation stage to eliminate …

A soft-error resilient low power static random access memory cell

A Sachdeva, VK Tomar - Analog Integrated Circuits and Signal Processing, 2021 - Springer
Advent and rapid development of on-chip computation in applications based on internet of
things has opened space for integration of human life processes with technology. Wireless …

One‐sided 10T static‐random access memory cell for energy‐efficient and noise‐immune internet of things applications

A Darabi, MR Salehi, E Abiri - International Journal of Circuit …, 2023 - Wiley Online Library
This paper presents a one‐sided 10‐transistors static‐random access memory (SRAM) cell
appropriate for the internet of things (IoT) applications in which energy‐efficient SRAM cells …