Turnitin
降AI改写
早检测系统
早降重系统
Turnitin-UK版
万方检测-期刊版
维普编辑部版
Grammarly检测
Paperpass检测
checkpass检测
PaperYY检测
Semiconductor devices with superlattice layers providing halo implant peak confinement and related methods
RJ Mears, H Takeuchi - US Patent 9,899,479, 2018 - Google Patents
(57) ABSTRACT A semiconductor device may include a semiconductor sub strate, and a
plurality of field effect transistors (FETs) on the semiconductor substrate. Each FET may …
plurality of field effect transistors (FETs) on the semiconductor substrate. Each FET may …
Vertical semiconductor devices including superlattice punch through stop layer and related methods
R Mears, H Takeuchi, E Trautmann - US Patent 9,275,996, 2016 - Google Patents
(57) ABSTRACT A semiconductor device may include a substrate, and a plu rality of fins
spaced apart on the substrate. Each of the fins may include a lower semiconductor fin …
spaced apart on the substrate. Each of the fins may include a lower semiconductor fin …
Semiconductor devices with enhanced deterministic do** and related methods
RJ Mears - US Patent 10,170,560, 2019 - Google Patents
(57) ABSTRACT A method for making a semiconductor device may include forming a
plurality of stacked groups of layers on a semi conductor substrate, with each group of layers …
plurality of stacked groups of layers on a semi conductor substrate, with each group of layers …
Semiconductor devices including superlattice depletion layer stack and related methods
R Mears, H Takeuchi, E Trautmann - US Patent 9,406,753, 2016 - Google Patents
(57) ABSTRACT A semiconductor device may include an alternating stack of Superlattice
and bulk semiconductor layers on a Substrate, with each Superlattice layer including a …
and bulk semiconductor layers on a Substrate, with each Superlattice layer including a …
Semiconductor device including a superlattice and replacement metal gate structure and related methods
(57) ABSTRACT A semiconductor device may include a substrate having a channel recess
therein, a plurality of spaced apart shallow trench isolation (STI) regions in the Substrate …
therein, a plurality of spaced apart shallow trench isolation (STI) regions in the Substrate …
Vertical semiconductor devices including superlattice punch through stop layer and related methods
R Mears, H Takeuchi, E Trautmann - US Patent 9,972,685, 2018 - Google Patents
(57) ABSTRACT A semiconductor device may include a substrate, and a plurality of fins
spaced apart on the substrate. Each of the fins may include a lower semiconductor fin …
spaced apart on the substrate. Each of the fins may include a lower semiconductor fin …
Semiconductor device including a superlattice and replacement metal gate structure and related methods
(57) ABSTRACT A semiconductor device may include a substrate having a channel recess
therein, a plurality of spaced apart shallow trench isolation (STI) regions in the substrate …
therein, a plurality of spaced apart shallow trench isolation (STI) regions in the substrate …
Methods for making a semiconductor device including atomic layer structures using N2O as an oxygen source
R Stephenson, N Cody - US Patent 9,558,939, 2017 - Google Patents
US9558939B1 - Methods for making a semiconductor device including atomic layer structures
using N2O as an oxygen source - Google Patents US9558939B1 - Methods for making a …
using N2O as an oxygen source - Google Patents US9558939B1 - Methods for making a …
Method for making enhanced semiconductor structures in single wafer processing chamber with desired uniformity control
RJ Mears, N Cody, RJ Stephenson - US Patent 9,721,790, 2017 - Google Patents
US9721790B2 - Method for making enhanced semiconductor structures in single wafer
processing chamber with desired uniformity control - Google Patents US9721790B2 - Method …
processing chamber with desired uniformity control - Google Patents US9721790B2 - Method …
Semiconductor devices with superlattice and punch-through stop (PTS) layers at different depths and related methods
RJ Mears, H Takeuchi - US Patent 9,941,359, 2018 - Google Patents
(57) ABSTRACT A semiconductor device may include a semiconductor sub strate and first
transistors having a first operating voltage. Each first transistor may include a first channel …
transistors having a first operating voltage. Each first transistor may include a first channel …