A 9.1 ENOB 200MS/s asynchronous SAR ADC with hybrid single-ended/differential DAC in 55-nm CMOS for image sensing signals
A 9.1 ENOB 200 MS/s asynchronous SAR analog-to-digital converter (ADC) dealing with
image sensing signals is presented in this paper. The proposed ADC, designed in 55-nm …
image sensing signals is presented in this paper. The proposed ADC, designed in 55-nm …
A 0.18 μm CMOS capacitor-less low-drop out voltage regulator compensated via the bootstrap flipped-voltage follower
This work presents a Cap-less Low-Drop Out (LDO) Voltage Regulator that uses a Bootstrap
Flipped-Voltage Follower (B-FVF) as the input stage of its active compensation network …
Flipped-Voltage Follower (B-FVF) as the input stage of its active compensation network …
Amplifier compensation circuits and methods
DJ Plourde, Q Wan - US Patent 11,664,772, 2023 - Google Patents
US11664772B2 - Amplifier compensation circuits and methods - Google Patents
US11664772B2 - Amplifier compensation circuits and methods - Google Patents Amplifier …
US11664772B2 - Amplifier compensation circuits and methods - Google Patents Amplifier …
Design of a fast transient response output-capacitorless LDO
H You, L Sun - Information Science and Electronic …, 2016 - api.taylorfrancis.com
Based on CSMC 0.18 μm CMOS process, a fast transient response output-capacitorless
LDO circuit was designed. By adding a novel transient enhancement circuit, optimising the …
LDO circuit was designed. By adding a novel transient enhancement circuit, optimising the …