Gate structures and methods of forming same
SB More, CH Lee, SC Chang - US Patent App. 17/226,905, 2022 - Google Patents
(57) ABSTRACT A device includes a first gate region having a first gate length; a first spacer
on a sidewall of the first gate region; a semiconductor over the first gate region; a second …
on a sidewall of the first gate region; a semiconductor over the first gate region; a second …
Method of manufacturing a semiconductor device and a semiconductor device
S Kuan, SB More, LIN Chien, CH Lee… - US Patent …, 2024 - Google Patents
In a method of manufacturing a semiconductor device, a fin structure in which first
semiconductor layers and second semiconductor layers are alternately stacked is formed, a …
semiconductor layers and second semiconductor layers are alternately stacked is formed, a …
Gate-all-around devices having self-aligned cap** between channel and backside power rail
CW Hsu, LK Chu, ML Huang, YU Jia-Ni… - US Patent …, 2024 - Google Patents
A semiconductor device includes a first interconnect structure and multiple channel layers
stacked over the first interconnect structure. A bottommost one of the multiple channel layers …
stacked over the first interconnect structure. A bottommost one of the multiple channel layers …
Spacer Structures for Nano-Sheet-Based Devices
SC Chen, KC Chiang, ZC Lin - US Patent App. 18/446,733, 2023 - Google Patents
2023-08-09 Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
reassignment TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD …
reassignment TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD …
Semiconductor device having air gap between gate electrode and source/drain pattern
YU Haejun, K Choi, SH Lee - US Patent 12,046,632, 2024 - Google Patents
A semiconductor device includes an active pattern on a substrate, a source/drain pattern on
the active pattern, a channel pattern connected to the source/drain pattern, the channel …
the active pattern, a channel pattern connected to the source/drain pattern, the channel …
Nanosheet field-effect transistor device and method of forming
WK Lin, YC Lu, CH Chang, CO Chui - US Patent 12,009,407, 2024 - Google Patents
A method of forming a semiconductor device includes: forming a dummy gate structure over
a nanostructure, where the nanostructure overlies a fin that protrudes above a substrate …
a nanostructure, where the nanostructure overlies a fin that protrudes above a substrate …
Semiconductor devices and methods of fabricating the same
KC Liu, CM Liu - US Patent 12,183,806, 2024 - Google Patents
A semiconductor structure and a method of forming the same are provided. In an
embodiment, an exemplary method includes providing a workpiece having a first active …
embodiment, an exemplary method includes providing a workpiece having a first active …
Multi-gate semiconductor device with inner spacer and fabrication method thereof
BF Wu, CH Yu, CP Lin - US Patent 12,191,379, 2025 - Google Patents
A method of manufacturing a semiconductor device includes forming a fin structure in which
first semiconductor layers and second semiconductor layers are alternatively stacked, the …
first semiconductor layers and second semiconductor layers are alternatively stacked, the …
Epitaxial structures exposed in airgaps for semiconductor devices
PY Lin, WY Lee, CP Lin, TH Chiu, K Cheng… - US Patent …, 2024 - Google Patents
A semiconductor device includes a source/drain feature over a semiconductor substrate,
channel layers over the semiconductor substrate and connected to the source/drain feature …
channel layers over the semiconductor substrate and connected to the source/drain feature …
Spacer Structures for Nano-Sheet-Based Devices
SC Chen, KC Chiang, ZC Lin - US Patent App. 17/219,410, 2022 - Google Patents
(57) ABSTRACT A semiconductor device includes a substrate, a first source! drain feature
and a second source/drain feature over the substrate, a first semiconductor layer and a …
and a second source/drain feature over the substrate, a first semiconductor layer and a …