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How to Consider SEEs When Designing a SiGe Low-Noise Amplifier-An Overview
The application of radiation-hardening by design (RHBD) to the low-noise amplifier (LNA) in
an RF communications receiver has promise for improving data fidelity in applications …
an RF communications receiver has promise for improving data fidelity in applications …
Single event double-upset fully immune and transient pulse filterable latch design for nanoscale CMOS
A Yan, Z Huang, X Fang, Y Ouyang, H Deng - Microelectronics Journal, 2017 - Elsevier
Technology scaling results in that, single event effects, such as single event double-upset
due to double-node charge sharing, and single event transient (ie an invalid pulse) …
due to double-node charge sharing, and single event transient (ie an invalid pulse) …
Design and analysis of radiation-tolerant high frequency voltage controlled oscillator for PLL applications
P Rajalingam, S Jayakumar, S Routray - AEU-International Journal of …, 2021 - Elsevier
Abstract Single Event Transients (SET's) occur in analog integrated circuits due to the strike
of a heavy-ion (or) heavy energy proton at the transistor junction. It produces electron–hole …
of a heavy-ion (or) heavy energy proton at the transistor junction. It produces electron–hole …
Analysis of location and LET dependence of single event transient in 14 nm SOI FinFET
B Liu, C Li, P Zhou, J Zhu - Nuclear Instruments and Methods in Physics …, 2022 - Elsevier
FinFET, with narrow silicon fin, and high k/metal gate stacked combined with SOI technology
brings benefits to radiation effects. Single event transient (SET) of SOI FinFET at 14 nm …
brings benefits to radiation effects. Single event transient (SET) of SOI FinFET at 14 nm …
A physics-based single event transient pulse width model for CMOS VLSI circuits
The single-event transients in MOSFETs due to heavy ion strikes introduce soft errors in sub-
50 nm CMOS VLSI circuits. These transients are easily captured and propagated in high …
50 nm CMOS VLSI circuits. These transients are easily captured and propagated in high …
Improving combinational circuit reliability against multiple event transients via a partition and restructuring approach
MR Rohanipoor, B Ghavami… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
Traditionally, increasing logical masking probability has been used to improve the circuit
reliability against single-event transients (SETs). As the very first work, this paper presents a …
reliability against single-event transients (SETs). As the very first work, this paper presents a …
CICADA: a new tool to design circuits with correction and detection abilities
AL Stempkovsky, TD ZHukova… - … on Control and …, 2021 - ieeexplore.ieee.org
In view of rapid development of microelectronic industry, there is a growing need to ensure
reliability and fault tolerance of combinational devices exposed to various destabilizing …
reliability and fault tolerance of combinational devices exposed to various destabilizing …
Investigation of Single Event Transient Induced by Process Variability in 14 nm High-k/Metal Gate SOI FinFET Devices
B Liu, C Li, M Chen - Silicon, 2023 - Springer
With the down scaling of device dimensions, FinFET structure faces the problem of the
increasing process variability which results to the device performance mismatch. By …
increasing process variability which results to the device performance mismatch. By …
Single event transients mitigation techniques for CMOS integrated VCOs
Single event transients (SETs) in analog integrated circuits result from the interaction of a
heavy ion or high-energy proton with a sensitive pn junction. SETs induce electron-hole …
heavy ion or high-energy proton with a sensitive pn junction. SETs induce electron-hole …
3D numerical simulation of a Z gate layout MOSFET for radiation tolerance
In this paper, for the first time, an n-channel metal-oxide-semiconductor field-effect transistor
(NMOSFET) layout with a Z gate and an improved total ionizing dose (TID) tolerance is …
(NMOSFET) layout with a Z gate and an improved total ionizing dose (TID) tolerance is …