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Mangrove: A scalable framework for folding-based SNARKs
We present a framework for building efficient folding-based SNARKs. First we develop a
new “uniformizing” compiler for NP statements that converts any poly-time computation to a …
new “uniformizing” compiler for NP statements that converts any poly-time computation to a …
Batchman and robin: Batched and non-batched branching for interactive ZK
Vector Oblivious Linear Evaluation (VOLE) supports fast and scalable interactive Zero-
Knowledge (ZK) proofs. Despite recent improvements to VOLE-based ZK, compiling proof …
Knowledge (ZK) proofs. Despite recent improvements to VOLE-based ZK, compiling proof …
Tight zk cpu: Batched zk branching with cost proportional to evaluated instruction
We explore Zero-Knowledge Proofs (ZKPs) of statements expressed as programs written in
high-level languages, eg, C or assembly. At the core of executing such programs in ZK is the …
high-level languages, eg, C or assembly. At the core of executing such programs in ZK is the …
Scalable zero-knowledge proofs for non-linear functions in machine learning
Zero-knowledge (ZK) proofs have been recently explored for the integrity of machine
learning (ML) inference. However, these protocols suffer from high computational overhead …
learning (ML) inference. However, these protocols suffer from high computational overhead …
Volatile and persistent memory for zkSNARKs via algebraic interactive proofs
In verifiable outsourcing, an untrusted server runs an expensive computation and produces
a succinct proof (called a SNARK) of the results. In many scenarios, the computation …
a succinct proof (called a SNARK) of the results. In many scenarios, the computation …
Muxproofs: Succinct arguments for machine computation from vector lookups
Proofs for machine computation prove the correct execution of arbitrary programs that
operate over fixed instruction sets (eg, RISC-V, EVM, Wasm). A standard approach for …
operate over fixed instruction sets (eg, RISC-V, EVM, Wasm). A standard approach for …
[PDF][PDF] Dora: Processor Expressiveness is (Nearly) Free in Zero-Knowledge for RAM Programs.
Existing protocols for proving the correct execution of a RAM program in zero-knowledge are
plagued by a processor expressiveness tradeo: supporting fewer instructions results in …
plagued by a processor expressiveness tradeo: supporting fewer instructions results in …
An efficient and extensible zero-knowledge proof framework for neural networks
In recent years, cloud vendors have started to supply paid services for data analysis by
providing interfaces of their well-trained neural network models. However, customers lack …
providing interfaces of their well-trained neural network models. However, customers lack …
Dora: A simple approach to zero-knowledge for RAM programs
Existing protocols for proving the correct execution of a RAM program in zero-knowledge are
plagued by a processor expressiveness tradeoff: supporting fewer instructions results in …
plagued by a processor expressiveness tradeoff: supporting fewer instructions results in …
Twist and Shout: Faster memory checking arguments via one-hot addressing and increments
A memory checking argument enables a prover to prove to a verifier that it is correctly
processing reads and writes to memory. They are used widely in modern SNARKs …
processing reads and writes to memory. They are used widely in modern SNARKs …