A general solution to the P4P problem for camera with unknown focal length

M Bujnak, Z Kukelova, T Pajdla - 2008 IEEE Conference on …, 2008 - ieeexplore.ieee.org
This paper presents a general solution to the determination of the pose of a perspective
camera with unknown focal length from images of four 3D reference points. Our problem is a …

Defensive loop tiling for shared cache

B Bao, C Ding - Proceedings of the 2013 IEEE/ACM …, 2013 - ieeexplore.ieee.org
Loop tiling is a compiler transformation that tailors an application's working set to fit in a
cache hierarchy. On today's multicore processors, part of the hierarchy especially the last …

Bandwidth guaranteed routing for ad-hoc networks with interference consideration

Z Jia, R Gupta, J Walrand… - 10th IEEE Symposium on …, 2005 - ieeexplore.ieee.org
The problem of computing bandwidth guaranteed paths for given flow requests in an ad-hoc
network is complicated because neighboring links share the medium. We define the path …

Understanding computation time: a critical discussion of time as a computational performance metric

D Harris-Birtill, R Harris-Birtill - Time in Variance, 2021 - brill.com
Computation time is an important performance metric that scientists and software engineers
use to determine whether an algorithm is capable of running within a reasonable time frame …

Performance metrics and models for shared cache

C Ding, X ** graph-based co-scheduling algorithms on multicore computers
L He, H Zhu, SA Jarvis - IEEE Transactions on Parallel and …, 2015 - ieeexplore.ieee.org
It is common that multiple cores reside on the same chip and share the on-chip cache. As a
result, resource sharing can cause performance degradation of co-running jobs. Job co …

Code layout optimization for defensiveness and politeness in shared cache

P Li, H Luo, C Ding, Z Hu, H Ye - 2014 43rd International …, 2014 - ieeexplore.ieee.org
Code layout optimization seeks to reorganize the instructions of a program to better utilize
the cache. On multicore, parallel executions improve the throughput but may significantly …

Optimal footprint symbiosis in shared cache

X Wang, Y Li, Y Luo, X Hu, J Brock… - 2015 15th IEEE/ACM …, 2015 - ieeexplore.ieee.org
On multicore processors, applications are run sharing the cache. This paper presents online
optimization to collocate applications to minimize cache interference to maximize …

Compositional model of coherence and NUMA effects for optimizing thread and data placement

H Luo, J Brock, P Li, C Ding… - 2016 IEEE International …, 2016 - ieeexplore.ieee.org
On today's multi-socket systems, the parallel performance is hampered by remote cache and
memory access. There is much prior work on thread and data placement to curb remote …

Hera: A Heterogeneity-Aware Multi-Tenant Inference Server for Personalized Recommendations

Y Choi, J Kim, M Rhu - arxiv preprint arxiv:2302.11750, 2023 - arxiv.org
While providing low latency is a fundamental requirement in deploying recommendation
services, achieving high resource utility is also crucial in cost-effectively maintaining the …