Fin transistors with doped control layer for junction control

M Mehrotra - US Patent App. 17/128,545, 2022 - Google Patents
In a described example, an integrated circuit includes a substrate of a semiconductor
material, a source region, a gate region, a drain region and a fin structure formed on the …

Leakage reduction between two transistor devices on a same continuous fin

CY Lin, BR Young, TH Hsieh - US Patent 12,073,168, 2024 - Google Patents
In some embodiments, the present disclosure relates to a method that includes removing
portions of a substrate to form a continuous fin protruding from an upper surface of the …

Method and system for fabrication of a vertical fin-based field effect transistor

C Drowley, R Milano, SS Pidaparthi… - US Patent …, 2024 - Google Patents
A method of fabricating a vertical fin-based field effect transistor (FET) includes providing a
semiconductor substrate having a first surface and a second surface, the semiconductor …

Vertical field-effect transistor and method for its formation

J Baringhaus, J Rudhard - US Patent App. 17/775,924, 2022 - Google Patents
A vertical field-effect transistor. The vertical field-effect transistor includes: a drift region, a
semiconductor fin on or above the drift region, and a source/drain electrode on or above the …

Leakage reduction between two transistor devices on a same continuous fin

CY Lin, BR Young, TH Hsieh - US Patent 11,797,743, 2023 - Google Patents
2020-11-25 Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
reassignment TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. ASSIGNMENT OF …