LumiNOC: A power-efficient, high-performance, photonic network-on-chip

C Li, M Browning, PV Gratz… - IEEE Transactions on …, 2014 - ieeexplore.ieee.org
To meet energy-efficient performance demands, the computing industry has moved to
parallel computer architectures, such as chip multiprocessors (CMPs), internally …

In-network monitoring and control policy for DVFS of CMP networks-on-chip and last level caches

X Chen, Z Xu, H Kim, P Gratz, J Hu… - ACM Transactions on …, 2013 - dl.acm.org
In chip design today and for a foreseeable future, the last-level cache and on-chip
interconnect is not only performance critical but also a substantial power consumer. This …

Design space exploration for wireless NoCs incorporating irregular network routing

P Wettin, R Kim, J Murray, X Yu… - … on Computer-Aided …, 2014 - ieeexplore.ieee.org
The millimeter-wave small-world wireless network-on-chip (mSWNoC) is an enabling
interconnect architecture to design high-performance and low-power multicore chips. As the …

Fine-grained bandwidth adaptivity in networks-on-chip using bidirectional channels

R Hesse, J Nicholls, NE Jerger - 2012 IEEE/ACM Sixth …, 2012 - ieeexplore.ieee.org
Networks-on-Chip (NoC) serve as efficient and scalable communication substrates for many-
core architectures. Currently, the bandwidth provided in NoCs is over provisioned for their …

A case study on the communication and computation behaviors of real applications in NoC-based MPSoCs

Z Wang, W Liu, J Xu, B Li, R Iyer… - 2014 IEEE computer …, 2014 - ieeexplore.ieee.org
Network-on-chip (NoC) based multiprocessor system-on-chips (MPSoCs) have been
proposed as promising architectures to meet modern applications' ever-increasing demands …

Characterizing the spatio-temporal qubit traffic of a quantum intranet aiming at modular quantum computer architectures

S Rodrigo, D Spanò, M Bandic, S Abadal… - Proceedings of the 9th …, 2022 - dl.acm.org
Quantum many-core processors are envisioned as the ultimate solution for the scalability of
quantum computers. Based upon Noisy Intermediate-Scale Quantum (NISQ) chips …

The runahead network-on-chip

Z Li, J San Miguel, NE Jerger - 2016 IEEE International …, 2016 - ieeexplore.ieee.org
With increasing core counts and higher memory demands from applications, it is imperative
that networks-on-chip (NoCs) provide low-latency, power-efficient communication …

Performance evaluation of noc-based multicore systems: From traffic analysis to noc latency modeling

Z Qian, P Bogdan, CY Tsui, R Marculescu - ACM Transactions on Design …, 2016 - dl.acm.org
In this survey, we review several approaches for predicting performance of Network-on-Chip
(NoC)-based multicore systems, starting from the traffic models to the complex NoC models …

CNoC: high-radix clos network-on-chip

YH Kao, M Yang, NS Artan… - IEEE Transactions on …, 2011 - ieeexplore.ieee.org
Many high-radix network-on-chip (NoC) topologies have been proposed to improve network
performance with an ever-growing number of processing elements (PEs) on a chip. We …

BLOCON: A bufferless photonic clos network-on-chip architecture

YH Kao, HJ Chao - Proceedings of the Fifth ACM/IEEE International …, 2011 - dl.acm.org
On-chip photonic waveguides have been proposed as a feasible replacement for the long
interconnects that cause speed and power bottlenecks. Along with recent advancements in …