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System and method utilizing distributed byte-wise buffers on a memory module
H Lee, JR Bhakta - US Patent 8,516,185, 2013 - Google Patents
5,345,412 A 9, 1994 ShiratSuchi 6,705,877 B1 3/2004 Li et al. 5,357.478 A 10, 1994 Kikuda
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et al. 6,717,855 B2 4/2004 Underwood 5,388,072 A 2f1995 Maticket al. 6,721,843 B1 …
Circuit providing load isolation and memory domain translation for memory module
JC Solomon, JR Bhakta - US Patent 7,916,574, 2011 - Google Patents
(57) ABSTRACT A circuit is configured to be mounted on a memory module connectable to a
computer system so as to be electrically coupled to a plurality of memory devices on the …
computer system so as to be electrically coupled to a plurality of memory devices on the …
Circuit providing load isolation and memory domain translation for memory module
JC Solomon, JR Bhakta - US Patent 7,881,150, 2011 - Google Patents
(57) ABSTRACT A circuit is con? gured to be mounted on a memory module so as to be
electrically coupled to a plurality of double-data-rate (DDR) memory devices arranged in …
electrically coupled to a plurality of double-data-rate (DDR) memory devices arranged in …
Multirank DDR memory modual with load reduction
JR Bhakta, JC Solomon - US Patent 8,756,364, 2014 - Google Patents
Related US. Application Data OTHER PUBLICATIONS (63) continuation Of application
NO'13/154,172> _? 1eq0n International Search Report and Written Opinion …
NO'13/154,172> _? 1eq0n International Search Report and Written Opinion …
System and method of increasing addressable memory space on a memory board
H Lee, JR Bhakta - US Patent 8,417,870, 2013 - Google Patents
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al. 7.05479 B2 5/2006 codiletal 6,018.787. A 1, 2000 I WI 9. 6,044,032 A 3, 2000 E …
al. 7.05479 B2 5/2006 codiletal 6,018.787. A 1, 2000 I WI 9. 6,044,032 A 3, 2000 E …
Circuit for memory module
JC Solomon, JR Bhakta - US Patent 8,081,536, 2011 - Google Patents
(57) ABSTRACT A circuit is configured to be mounted on a memory module configured to be
operationally coupled to a computer system. The memory module has a first number of ranks …
operationally coupled to a computer system. The memory module has a first number of ranks …
Memory module decoder
JR Bhakta, JC Solomon - US Patent 7,864,627, 2011 - Google Patents
(57) ABSTRACT A circuit is configured to be mounted on a memory module connectable to a
computer system so as to be electrically coupled to a plurality of memory devices on the …
computer system so as to be electrically coupled to a plurality of memory devices on the …
Circuit for providing chip-select signals to a plurality of ranks of a DDR memory module
JR Bhakta, JC Solomon - US Patent 8,081,535, 2011 - Google Patents
(57) ABSTRACT A circuit is configured to be mounted on a memory module connectable to a
computer system so as to be electrically coupled to a plurality of memory devices on the …
computer system so as to be electrically coupled to a plurality of memory devices on the …
Circuit for memory module
JC Solomon, JR Bhakta - US Patent 8,516,188, 2013 - Google Patents
(57) ABSTRACT A circuit is configured to be mounted on a memory module configured to be
operationally coupled to a computer system. The memory module has a first number of ranks …
operationally coupled to a computer system. The memory module has a first number of ranks …
Multi-rank memory module that emulates a memory module having a different number of ranks
H Amidi, KA Marino, S Kolli - US Patent 8,250,295, 2012 - Google Patents
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