Asynchronous-Logic QDI quad-rail sense-amplifier half-buffer approach for NoC router design
We propose a low area overhead and power-efficient asynchronous-logic quasi-delay-
insensitive (QDI) sense-amplifier half-buffer (SAHB) approach with quad-rail (ie, 1-of-4) data …
insensitive (QDI) sense-amplifier half-buffer (SAHB) approach with quad-rail (ie, 1-of-4) data …
Hermes-AA: A 65nm asynchronous NoC router with adaptive routing
This work presents the architecture and ASIC implementation of Hermes-AA, a flexible fully
asynchronous network on chip router employing an adaptive routing algorithm. Hermes-AA …
asynchronous network on chip router employing an adaptive routing algorithm. Hermes-AA …
An intermediate representation for composable typed streaming dataflow designs
Tydi is an open specification for streaming dataflow designs in digital circuits, allowing
designers to express how composite and variable-length data structures are transferred over …
designers to express how composite and variable-length data structures are transferred over …
Hermes-glp: A gals network on chip router with power control techniques
The evolution of deep submicron technologies allows the development of increasingly
complex Systems on a Chip (SoC). However, this evolution is rendering less viable some …
complex Systems on a Chip (SoC). However, this evolution is rendering less viable some …
Hermes-A–an asynchronous NoC router with distributed routing
This work presents the architecture and ASIC implementation of Hermes-A, an
asynchronous network on chip router. Hermes-A is coupled to a network interface that …
asynchronous network on chip router. Hermes-A is coupled to a network interface that …
Evaluation on FPGA of triple rail logic robustness against DPA and DEMA
Side channel attacks are known to be efficient techniques to retrieve secret data. In this
context, this paper concerns the evaluation of the robustness of triple rail logic against power …
context, this paper concerns the evaluation of the robustness of triple rail logic against power …
Authentication and encryption in cloud computing
JP Singh, S Kumar - 2015 International conference on smart …, 2015 - ieeexplore.ieee.org
Cloud Computing is becoming increasingly popular day by day. If the security parameters
are taken care properly many enterprises and government agencies will move into cloud …
are taken care properly many enterprises and government agencies will move into cloud …
Towards a complete methodology for synthesizing bundled-data asynchronous circuits on FPGAs
Asynchronous circuits are gaining momentum as a promising low-power alternative to the
conventional synchronous design approaches. In particular, single-rail bundled-data design …
conventional synchronous design approaches. In particular, single-rail bundled-data design …
Hardware-Accelerator Design by Composition: Dataflow Component Interfaces With Tydi–Chisel
C Cromjongh, Y Tian, HP Hofstee… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
As dedicated hardware is becoming more prevalent in accelerating complex applications,
methods are needed to enable easy integration of multiple hardware components into a …
methods are needed to enable easy integration of multiple hardware components into a …
Implementation of locally-clocked XBM state machines on FPGAs using synchronous CAD tools
FTDF Barbosa, DL De Oliveira… - … on Circuits and …, 2017 - ieeexplore.ieee.org
Controllers based on Synchronous Finite State Machines (SFSM) are widely used in the
control unit design of complex digital systems. These systems can present serious problems …
control unit design of complex digital systems. These systems can present serious problems …