Stochastic electronics: A neuro-inspired design paradigm for integrated circuits

TJ Hamilton, S Afshar, A van Schaik… - Proceedings of the …, 2014 - ieeexplore.ieee.org
As advances in integrated circuit (IC) fabrication technology reduce feature sizes to
dimensions on the order of nanometers, IC designers are facing many of the problems that …

Bayesian inference with Muller C-elements

JS Friedman, LE Calvet, P Bessière… - … on Circuits and …, 2016 - ieeexplore.ieee.org
Bayesian inference is a powerful approach for integrating independent conflicting
information for decision-making. Though an important component of robotic, biological, and …

Tuning Strassen's matrix multiplication for memory efficiency

M Thottethodi, S Chatterjee… - SC'98: Proceedings of …, 1998 - ieeexplore.ieee.org
Strassen's algorithm for matrix multiplication gains its lower arithmetic complexity at the
expense of reduced locality of reference, which makes it challenging to implement the …

Gallager B LDPC decoder with transient and permanent errors

CH Huang, Y Li, L Dolecek - IEEE Transactions on …, 2013 - ieeexplore.ieee.org
This paper studies the performance of a noisy Gallager B decoder for regular LDPC codes.
We assume that the noisy decoder is subject to both transient processor errors and …

Finite-Horizon Fault Estimation for Uncertain Linear Discrete Time-Varying Systems With Known Inputs

B Shen, SX Ding, Z Wang - … on Circuits and Systems II: Express …, 2013 - ieeexplore.ieee.org
In this brief, the finite-horizon H∞ fault estimation problem is investigated for a class of
uncertain linear discrete time-varying systems with known inputs. A new H∞ performance …

Density evolution and functional threshold for the noisy min-sum decoder

CK Ngassa, V Savin, E Dupraz… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
This paper investigates the behavior of the Min-Sum decoder running on noisy devices. Our
aim is to evaluate the robustness of the decoder to computation noise caused by the faulty …

Min-sum-based decoders running on noisy hardware

CK Ngassa, V Savin, D Declercq - 2013 IEEE Global …, 2013 - ieeexplore.ieee.org
This paper deals with Low-Density Parity-Check decoders running on noisy hardware. This
represents an unconventional paradigm in communication theory, since it is traditionally …

Stochastic computing improves the timing-error tolerance and latency of turbo decoders: Design guidelines and tradeoffs

I Perez-Andrade, S Zhong, RG Maunder… - IEEE …, 2016 - ieeexplore.ieee.org
Stochastic computing has been recently proposed for the hardware implementation of both
low-density parity-check (LDPC) decoders and turbo decoders, which facilitate near-optimal …

Ferroelectric FET-Based Bayesian Inference Engine for Disease Diagnosis

A Chakraborty, M Rafiq, YH Zarkob… - … on Circuits and …, 2025 - ieeexplore.ieee.org
Probabilistic/stochastic computations form the backbone of autonomous systems and
classifiers. Recently, biomedical applications of probabilistic computing such as Bayesian …

[HTML][HTML] Approximation enhancement for stochastic Bayesian inference

JS Friedman, J Droulez, P Bessière, J Lobo… - International Journal of …, 2017 - Elsevier
Advancements in autonomous robotic systems have been impeded by the lack of a
specialized computational hardware that makes real-time decisions based on sensory …