This paper presents an extensive literature review on Binary Neural Network (BNN). BNN
utilizes binary weights and activation function parameters to substitute the full-precision …

Artificial intelligence (AI) has revolutionized present-day life through automation and
independent decision-making capabilities. For AI hardware implementations, the 6T-SRAM …

This paper presents a mixed-signal SRAM-based in-memory computing (IMC) macro for
processing binarized neural networks. The IMC macro consists of (16K) SRAM-based …

For neural network (NN) applications at the edge of AI, computing-in-memory (CIM)
demonstrates promising energy efficiency. However, when the network size grows while …

The deployment of neural networks on edge devices has created a growing need for energy-
efficient computing. In this paper, we propose an all-digital standard cell-based time-domain …

Time-domain (TD) computing has attracted attention for its high computing efficiency and
suitability for applications on energy-constrained edge devices. In this paper, we present a …

Amid a strife for ever-growing AI processing capabilities at the edge, compute-in-memory
(CIM) SRAMs involving current-based dot-product (DP) operators have become excellent …

The rapid growth of CMOS logic circuits has surpassed the advancements in memory
access, leading to significant “memory wall” bottlenecks, particularly in artificial intelligence …

This paper presents an all-digital time-domain compute-in-memory (TDCIM) engine for
binary neural networks (BNNs), which is based on commercial standard cells facilitating …

Analog compute schemes and compute-in-memory (CIM) have emerged in an effort to
reduce the increasing power hunger of convolutional neural networks (CNNs), which …