ECM on graphics cards

DJ Bernstein, TR Chen, CM Cheng, T Lange… - Advances in Cryptology …, 2009 - Springer
This paper reports record-setting performance for the elliptic-curve method of integer
factorization: for example, 926.11 curves/second for ECM stage 1 with B 1= 8192 for 280-bit …

A parallel hardware architecture for fast Gaussian elimination over GF (2)

A Rupp, J Pelzl, C Paar, MC Mertens… - 2006 14th Annual …, 2006 - ieeexplore.ieee.org
This paper presents a hardware-optimized variant of the well-known Gaussian elimination
over GF (2) and its highly efficient implementation. The proposed hardware architecture can …

Weakness of for discrete logarithm cryptography

G Adj, A Menezes, T Oliveira… - … Conference on Pairing …, 2013 - Springer
Abstract In 2013, Joux, and then Barbulescu, Gaudry, Joux and Thomé, presented new
algorithms for computing discrete logarithms in finite fields of small and medium …

[PDF][PDF] Derivation of a scalable solution for the problem of factoring an n-bit integer

AM Rushdi, SS Zagzoog… - Journal of Advances in …, 2019 - academia.edu
The problem of integer factorization is ubiquitous in scientific and engineering applications
including the challenging task of cryptanalysis. This problem is intractable but might admit …

Mersenne factorization factory

T Kleinjung, JW Bos, AK Lenstra - … on the Theory and Application of …, 2014 - Springer
We present work in progress to completely factor seventeen Mersenne numbers using a
variant of the special number field sieve where sieving on the algebraic side is shared …

Batch NFS

DJ Bernstein, T Lange - International Conference on Selected Areas in …, 2014 - Springer
This paper shows, assuming standard heuristics regarding the number-field sieve, that a
“batch NFS” circuit of area L^ 1.181 ...+ o (1) factors L^ 0.5+ o (1) separate B-bit RSA keys in …

[PDF][PDF] Design of a hardware circuit for integer factorization using a big Boolean algebra

AM Rushdi, SS Zagzoog… - Journal of Advances in …, 2018 - academia.edu
An Integer factorization is an intractable problem that might be handled in real time via
hardware solution. Such a solution requires the extension of propositional logic to higher …

[BOOK][B] Efficient Execution of Irregular Dataflow Graphs: Hardware/Software Co-optimization for Probabilistic AI and Sparse Linear Algebra

N Shah, W Meert, M Verhelst - 2023 - books.google.com
This book focuses on the acceleration of emerging irregular sparse workloads, posed by
novel artificial intelligent (AI) models and sparse linear algebra. Specifically, the book …

Integer factorization based on elliptic curve method: Towards better exploitation of reconfigurable hardware

G De Meulenaer, F Gosset… - 15th Annual IEEE …, 2007 - ieeexplore.ieee.org
Currently, the best known algorithm for factorizing modulus of the RSA public key
cryptosystem is the Number Field Sieve. One of its important phases usually combines a …

[PDF][PDF] Smith-a parallel hardware architecture for fast gaussian elimination over gf (2)

A Bogdanov, MC Mertens, C Paar, J Pelzl… - Workshop on Special …, 2006 - Citeseer
This paper presents a hardware-optimized variant of the well-known Gaussian elimination
over GF (2) and its highly efficient implementation. The proposed hardware architecture, we …