A survey on assertion-based hardware verification
Hardware verification of modern electronic systems has been identified as a major
bottleneck due to the increasing complexity and time-to-market constraints. One of the major …
bottleneck due to the increasing complexity and time-to-market constraints. One of the major …
First international competition on runtime verification: rules, benchmarks, tools, and final results of CRV 2014
The first international Competition on Runtime Verification (CRV) was held in September
2014, in Toronto, Canada, as a satellite event of the 14th international conference on …
2014, in Toronto, Canada, as a satellite event of the 14th international conference on …
From signal temporal logic to FPGA monitors
Due to the heterogeneity and complexity of systems-of-systems (SoS), their simulation is
becoming very time consuming, expensive and hence impractical. As a result, design …
becoming very time consuming, expensive and hence impractical. As a result, design …
FPGA stream-monitoring of real-time properties
An essential part of cyber-physical systems is the online evaluation of real-time data
streams. Especially in systems that are intrinsically safety-critical, a dedicated monitoring …
streams. Especially in systems that are intrinsically safety-critical, a dedicated monitoring …
Incorporating efficient assertion checkers into hardware emulation
Assertion-based verification (ABV) is emerging as a paramount technique for industrial-
strength hardware verification, especially through the emerging property specification …
strength hardware verification, especially through the emerging property specification …
Runtime monitoring with recovery of the SENT communication protocol
K Selyunin, S Jaksic, T Nguyen, C Reidl… - … Aided Verification: 29th …, 2017 - Springer
We show how the requirements of the SENT communication protocol between a magnetic
sensor and an electronic control unit (ECU) can be monitored in real time, with a monitor …
sensor and an electronic control unit (ECU) can be monitored in real time, with a monitor …
An algebraic framework for runtime verification
Runtime verification (RV) is a pragmatic and scalable, yet rigorous technique, to assess the
correctness of complex systems, including cyber-physical systems (CPSs). Modern RV tools …
correctness of complex systems, including cyber-physical systems (CPSs). Modern RV tools …
A temporal language for SystemC
We describe a general approach for defining new temporal specification languages, and
adopting existing languages, for SystemC. We define the concept of" underlying trace" …
adopting existing languages, for SystemC. We define the concept of" underlying trace" …
Monitoring temporal SystemC properties
Monitoring temporal SystemC properties is crucial for the validation of functional and
transaction-level models, yet the current SystemC standard provides no support for temporal …
transaction-level models, yet the current SystemC standard provides no support for temporal …