Effective stateless model checking for C/C++ concurrency
We present a stateless model checking algorithm for verifying concurrent programs running
under RC11, a repaired version of the C/C++ 11 memory model without dependency cycles …
under RC11, a repaired version of the C/C++ 11 memory model without dependency cycles …
Model checking for weakly consistent libraries
We present GenMC, a model checking algorithm for concurrent programs that is parametric
in the choice of memory model and can be used for verifying clients of concurrent libraries …
in the choice of memory model and can be used for verifying clients of concurrent libraries …
GenMC: A Model Checker for Weak Memory Models
GenMC is an LLVM-based state-of-the-art stateless model checker for concurrent C/C++
programs. Its modular infrastructure allows it to support complex memory models, such as …
programs. Its modular infrastructure allows it to support complex memory models, such as …
Optimal stateless model checking under the release-acquire semantics
We present a framework for the efficient application of stateless model checking (SMC) to
concurrent programs running under the Release-Acquire (RA) fragment of the C/C++ 11 …
concurrent programs running under the Release-Acquire (RA) fragment of the C/C++ 11 …
Truly stateless, optimal dynamic partial order reduction
Dynamic partial order reduction (DPOR) verifies concurrent programs by exploring all their
interleavings up to some equivalence relation, such as the Mazurkiewicz trace equivalence …
interleavings up to some equivalence relation, such as the Mazurkiewicz trace equivalence …
VSync: push-button verification and optimization for synchronization primitives on weak memory models
J Oberhauser, RLDL Chehab, D Behrens… - Proceedings of the 26th …, 2021 - dl.acm.org
Implementing highly efficient and correct synchronization primitives on modern Weak
Memory Model (WMM) architectures, such as ARM and RISC-V, is very difficult even for …
Memory Model (WMM) architectures, such as ARM and RISC-V, is very difficult even for …
Grounding thin-air reads with event structures
The key challenge in defining the concurrency semantics of a programming language is how
to enable the most efficient compilation to existing hardware architectures, and yet forbid …
to enable the most efficient compilation to existing hardware architectures, and yet forbid …
BMC for weak memory models: Relation analysis for compact SMT encodings
N Gavrilenko, H Ponce-de-León, F Furbach… - … Aided Verification: 31st …, 2019 - Springer
We present Dartagnan, a bounded model checker (BMC) for concurrent programs under
weak memory models. Its distinguishing feature is that the memory model is not …
weak memory models. Its distinguishing feature is that the memory model is not …
Promising-ARM/RISC-V: a simpler and faster operational concurrency model
For ARMv8 and RISC-V, there are concurrency models in two styles, extensionally
equivalent: axiomatic models, expressing the concurrency semantics in terms of global …
equivalent: axiomatic models, expressing the concurrency semantics in terms of global …
HMC: Model checking for hardware memory models
Stateless Model Checking (SMC) is an effective technique for verifying safety properties of a
concurrent program by systematically exploring all of its executions. While SMC has been …
concurrent program by systematically exploring all of its executions. While SMC has been …