A survey on multi-net global routing for integrated circuits
This paper presents a comprehensive survey on global routing research over about the last
two decades, with an emphasis on the problems of simultaneously routing multiple nets in …
two decades, with an emphasis on the problems of simultaneously routing multiple nets in …
[BOK][B] Handbook of approximation algorithms and metaheuristics
TF Gonzalez - 2007 - taylorfrancis.com
Delineating the tremendous growth in this area, the Handbook of Approximation Algorithms
and Metaheuristics covers fundamental, theoretical topics as well as advanced, practical …
and Metaheuristics covers fundamental, theoretical topics as well as advanced, practical …
[BOK][B] On-chip communication architectures: system on chip interconnect
S Pasricha, N Dutt - 2010 - books.google.com
Over the past decade, system-on-chip (SoC) designs have evolved to address the ever
increasing complexity of applications, fueled by the era of digital convergence …
increasing complexity of applications, fueled by the era of digital convergence …
Repeater scaling and its impact on CAD
P Saxena, N Menezes, P Cocchini… - IEEE Transactions on …, 2004 - ieeexplore.ieee.org
We study scaling in the context of typical block-level wiring distributions, and identify its
impact on the design process. In particular, we study the implications of exponentially …
impact on the design process. In particular, we study the implications of exponentially …
[BOK][B] Electronic design automation: synthesis, verification, and test
This book provides broad and comprehensive coverage of the entire EDA flow. EDA/VLSI
practitioners and researchers in need of fluency in an" adjacent" field will find this an …
practitioners and researchers in need of fluency in an" adjacent" field will find this an …
Fixed-outline floorplanning: Enabling hierarchical design
Classical floorplanning minimizes a linear combination of area and wirelength. When
simulated annealing is used, eg, with the sequence pair representation, the typical choice of …
simulated annealing is used, eg, with the sequence pair representation, the typical choice of …
Vector quantizing feature space with a regular lattice
Most recent class-level object recognition systems work with visual words, ie, vector
quantized local descriptors. In this paper we examine the feasibility of a data-independent …
quantized local descriptors. In this paper we examine the feasibility of a data-independent …
An interconnect-centric design flow for nanometer technologies
J Cong - Proceedings of the IEEE, 2001 - ieeexplore.ieee.org
As the integrated circuits (ICs) are scaled into nanometer dimensions and operate in
gigahertz frequencies, interconnects have become critical in determining system …
gigahertz frequencies, interconnects have become critical in determining system …
FPGA-RPI: A novel FPGA architecture with RRAM-based programmable interconnects
In this paper we introduce a novel field programmable gate array (FPGA) architecture with
resistive random access memory (RRAM)-based programmable interconnects (FPGA-RPI) …
resistive random access memory (RRAM)-based programmable interconnects (FPGA-RPI) …
A practical methodology for early buffer and wire resource allocation
The dominating contribution of interconnect to system per-formance has made it critical to
plan for buffer and wiring resources in the layout. Both buffers and wires must be con …
plan for buffer and wiring resources in the layout. Both buffers and wires must be con …