An introduction to the compute express link (cxl) interconnect

D Das Sharma, R Blankenship, D Berger - ACM Computing Surveys, 2024 - dl.acm.org
The Compute Express Link (CXL) is an open industry-standard interconnect between
processors and devices such as accelerators, memory buffers, smart network interfaces …

Host congestion control

S Agarwal, A Krishnamurthy, R Agarwal - Proceedings of the ACM …, 2023 - dl.acm.org
The conventional wisdom in systems and networking communities is that congestion
happens primarily within the network fabric. However, adoption of high-bandwidth access …

Tiered Memory Management: Access Latency is the Key!

M Vuppalapati, R Agarwal - Proceedings of the ACM SIGOPS 30th …, 2024 - dl.acm.org
The emergence of tiered memory architectures has led to a renewed interest in memory
management. Recent works on tiered memory management innovate on mechanisms for …

A case for cxl-centric server processors

A Cho, A Saxena, M Qureshi, A Daglis - arxiv preprint arxiv:2305.05033, 2023 - arxiv.org
The memory system is a major performance determinant for server processors. Ever-
growing core counts and datasets demand higher bandwidth and capacity as well as lower …

COAXIAL: A CXL-Centric Memory System for Scalable Servers

A Cho, A Saxena, M Qureshi… - … Conference for High …, 2024 - ieeexplore.ieee.org
The memory system is a major performance determinant for server processors. Ever-
growing core counts and datasets demand higher memory bandwidth and capacity. DDR …

D-oram: Path-oram delegation for low execution interference on cloud servers with untrusted memory

R Wang, Y Zhang, J Yang - 2018 IEEE International …, 2018 - ieeexplore.ieee.org
Cloud computing has evolved into a promising computing paradigm. However, it remains a
challenging task to protect application privacy and, in particular, the memory access …

Optimizing power efficiency for 3D stacked GPU-in-memory architecture

W Wen, J Yang, Y Zhang - Microprocessors and Microsystems, 2017 - Elsevier
With the prevalence of data-centric computing, the key to achieving energy efficiency is to
reduce the latency and energy cost of data movement. Near data processing (NDP) is a …

Systems and methods for a hybrid parallel-serial memory access

J Jaffari, A Ansari, R Beraha - US Patent 9,747,038, 2017 - Google Patents
Systems and methods are disclosed for a hybrid parallel serial memory access by a system
on chip (SOC). The SoC is electrically coupled to the memory by both a parallel access …

Heterogeneous Processors and Memory Systems

H Wang - 2015 - search.proquest.com
With aggressive technology scaling, chip manufacturers have been integrating both the CPU
and the GPU in a single chip. This heterogeneous integration improves the overall …

Towards Efficient Secure Memory Systems with Oblivious RAM

R Wang - 2018 - search.proquest.com
When multiple users and applications share the resources on cloud servers, information
may be leaked through hidden channels related to the memory. Encryption can help to …