A scalable processing-in-memory accelerator for parallel graph processing

J Ahn, S Hong, S Yoo, O Mutlu, K Choi - Proceedings of the 42nd Annual …, 2015 - dl.acm.org
The explosion of digital data and the ever-growing need for fast data analysis have made in-
memory big-data processing in computer systems increasingly important. In particular, large …

Using Chiplet Encapsulation Technology to Achieve Processing-in-Memory Functions

W Tian, B Li, Z Li, H Cui, J Shi, Y Wang, J Zhao - Micromachines, 2022 - mdpi.com
With the rapid development of 5G, artificial intelligence (AI), and high-performance
computing (HPC), there is a huge increase in the data exchanged between the processor …

Clearing the clouds: a study of emerging scale-out workloads on modern hardware

M Ferdman, A Adileh, O Kocberber, S Volos… - Acm sigplan …, 2012 - dl.acm.org
Emerging scale-out workloads require extensive amounts of computational resources.
However, data centers using modern server hardware face physical constraints in space …

Practical near-data processing for in-memory analytics frameworks

M Gao, G Ayers, C Kozyrakis - 2015 International Conference …, 2015 - ieeexplore.ieee.org
The end of Dennard scaling has made all systemsenergy-constrained. For data-intensive
applications with limitedtemporal locality, the major energy bottleneck is data …

TOP-PIM: Throughput-oriented programmable processing in memory

D Zhang, N Jayasena, A Lyashevsky… - Proceedings of the 23rd …, 2014 - dl.acm.org
As computation becomes increasingly limited by data movement and energy consumption,
exploiting locality throughout the memory hierarchy becomes critical to continued …

A durable and energy efficient main memory using phase change memory technology

P Zhou, B Zhao, J Yang, Y Zhang - ACM SIGARCH computer …, 2009 - dl.acm.org
Using nonvolatile memories in memory hierarchy has been investigated to reduce its energy
consumption because nonvolatile memories consume zero leakage power in memory cells …

Disaggregated memory for expansion and sharing in blade servers

K Lim, J Chang, T Mudge, P Ranganathan… - ACM SIGARCH …, 2009 - dl.acm.org
Analysis of technology and application trends reveals a growing imbalance in the peak
compute-to-memory-capacity ratio for future servers. At the same time, the fraction …

3D-stacked memory architectures for multi-core processors

GH Loh - ACM SIGARCH computer architecture news, 2008 - dl.acm.org
Three-dimensional integration enables stacking memory directly on top of a microprocessor,
thereby significantly reducing wire delay between the two. Previous studies have examined …

Die stacking (3D) microarchitecture

B Black, M Annavaram, N Brekelbaum… - 2006 39th Annual …, 2006 - ieeexplore.ieee.org
3D die stacking is an exciting new technology that increases transistor density by vertically
integrating two or more die with a dense, high-speed interface. The result of 3D die stacking …

A novel architecture of the 3D stacked MRAM L2 cache for CMPs

G Sun, X Dong, Y **e, J Li… - 2009 IEEE 15th …, 2009 - ieeexplore.ieee.org
Magnetic random access memory (MRAM) is a promising memory technology, which has
fast read access, high density, and non-volatility. Using 3D heterogeneous integrations, it …