Increases in on-chip communication delay and the large working sets of server and scientific
workloads complicate the design of the on-chip last-level cache for multicore processors …

Although silicon optical technology is still in its formative stages, and the more near-term
application is chip-to-chip communication, rapid advances have been made in the …

In chip multiprocessors (CMPs), limiting the number of offchip cache misses is crucial for
good performance. Many multithreaded programs provide opportunities for constructive …

A 43-GHz wireless inter-chip data link including antennas, transmitters, and receivers is
presented. The industry standard bonding wires are exploited to provide high efficiency and …

Optical interconnects are touted as the solution to the performance bottleneck of future
interconnects in scaled technology nodes. Though significant strides have been made in …

Photonic interconnects have emerged as a promising candidate technology for high-
performance energy-efficient on-chip, on-board, and datacenter-scale interconnects …

This paper introduces a new set of long duration captures of Internet traffic headers. The
capture is being performed on a continuous on-going basis and is approaching a year in …

As indicated in the latest version of ITRS roadmap, optical wiring is a viable interconnect
technology for future SoC/SiC/SiP designs that can provide broad band data transfer rates …

The increasing number of Intellectual Property (IP) cores challenges the traditional electrical
Network on Chip (NoC). Silicon nanophotonics becomes a leading technology because of …

Increases in on-chip communication delay and the large working sets of commercial and
scientific workloads complicate the design of the on-chip last-level cache for multicore …