Machine learning algorithms for FPGA Implementation in biomedical engineering applications: A review

MB Altman, W Wan, AS Hosseini, SA Nowdeh… - Heliyon, 2024‏ - cell.com
Abstract Field Programmable Gate Arrays (FPGAs) are integrated circuits that can be
configured by the user after manufacturing, making them suitable for customized hardware …

FPGA implementation of a wireless sensor node with built-in security coprocessors for secured key exchange and data transfer

A Toubal, B Bengherbia, MO Zmirli, A Guessoum - Measurement, 2020‏ - Elsevier
The technological advances in wireless sensor nodes and the appearance of the Internet of
Things (IoT) concept have reinforced interest in wireless sensor networks (WSN), as one of …

A run-time reconfiguration method for an FPGA-based electrical capacitance tomography system

D Wanta, WT Smolik, J Kryszyn, P Wróblewski… - Electronics, 2022‏ - mdpi.com
A desirable feature of an electrical capacitance tomography system is the adaptation
possibility to any sensor configuration and measurement mode. A run-time reconfiguration of …

Human-Centered Edge Artificial Intelligence for Smart Factory Applications in Industry 5.0: A Review and Perspective

LH Nguyen, KD Tran, X Zeng, KP Tran - Artificial Intelligence for Safety …, 2024‏ - Springer
Abstract The integration of Human-Centered Edge Artificial Intelligence (HCE-AI) in smart
factories within the framework of Industry 5.0. Industry 5.0 emphasizes collaboration …

A customized balanced-objective genetic algorithm for task scheduling in reconfigurable computing systems

M Gholamrezanejad, HS Shahhoseini… - … and Information Systems, 2024‏ - Springer
Reconfiguration and hardware implementation capabilities in reconfigurable computing
(RC) systems make them more appropriate to recent computationally intensive applications …

Design and FPGA Implementation of Real-Time Edge Detectors Based on Interval Type-2 Fuzzy Systems.

E Ontiveros-Robles, P Melin… - Journal of Multiple …, 2019‏ - search.ebscohost.com
The present work presents a hardware architecture design for real-time edge detection
based on Interval Type-2 fuzzy systems. The proposed architecture is designed in order to …

High-throughput line buffer microarchitecture for arbitrary sized streaming image processing

R Shi, JSJ Wong, HKH So - Journal of Imaging, 2019‏ - mdpi.com
Parallel hardware designed for image processing promotes vision-guided intelligent
applications. With the advantages of high-throughput and low-latency, streaming …

[HTML][HTML] Reconfigurable Platform Pre-Processing MAC Unit Design: For Image Processing Core Architecture in Restoration Applications

GN Chiranjeevi, S Kulkarni - Latest Advances and New Visions of …, 2023‏ - intechopen.com
The overwhelming majority of image processing algorithms are two-dimensional (2D) and,
as a result, their scope is limited. As a result, the 2D convolution function has important …

Image processing using a reconfigurable platform: Pre-processing block hardware architecture

GN Chiranjeevi, S Kulkarni - International Journal of …, 2021‏ - search.proquest.com
Real time image processing is a challenging task in which fetching the sub image requires
offset memory access apart from core processing needs. This paper aims at overcoming the …

A Linux-based support for develo** real-time applications on heterogeneous platforms with dynamic FPGA reconfiguration

M Pagani, A Biondi, M Marinoni, L Molinari… - Future Generation …, 2022‏ - Elsevier
Computing platforms for next-generation cyber–physical systems are evolving towards
heterogeneous architectures comprising different processing elements and hardware …