Boosting the performance of an ultrascaled carbon nanotube junctionless tunnel field-effect transistor using an ungated region: NEGF simulation
K Tamersit - Journal of Computational Electronics, 2019 - Springer
This paper focuses on the role of the longitudinal spacing between the auxiliary gate and
control gate in boosting the performance of an ultrascaled junctionless carbon nanotube …
control gate in boosting the performance of an ultrascaled junctionless carbon nanotube …
Optimising operational amplifiers by evolutionary algorithms and gm/Id method
E Tlelo-Cuautle… - International Journal of …, 2016 - Taylor & Francis
The evolutionary algorithm called non-dominated sorting genetic algorithm (NSGA-II) is
applied herein in the optimisation of operational transconductance amplifiers. NSGA-II is …
applied herein in the optimisation of operational transconductance amplifiers. NSGA-II is …
Systematic circuit design and analysis using generalised gm/ID functions of MOS devices
H Aminzadeh - IET Circuits, Devices & Systems, 2020 - Wiley Online Library
The conventional approach to implementing analogue integrated circuits in nano‐scale
complementary metal oxide semiconductor (CMOS) technologies relies basically on circuit …
complementary metal oxide semiconductor (CMOS) technologies relies basically on circuit …
Particle swarm optimization with aging leader and challengers for optimal design of analog active filters
Due to the manufacturing limitations, the task of optimal analog active filter design by hand is
very difficult. Evolutionary computation may be a competent implement for automatic …
very difficult. Evolutionary computation may be a competent implement for automatic …
A local surrogate-based parallel optimization for analog circuits
S Du, H Liu, H Yin, F Yu, J Li - AEU-International Journal of Electronics and …, 2021 - Elsevier
Computationally expensive simulations make challenges for analog/RF circuit and
electromagnetic device design automation, where efficiency is a key issue. Both surrogate …
electromagnetic device design automation, where efficiency is a key issue. Both surrogate …
Sizing analogue integrated circuits by integer encoding and NSGA-II
Traditional sizing approaches for analogue integrated circuits (ICs) consisting of metal-oxide-
semiconductor field-effect transistors manipulate real values for the widths (W) and lengths …
semiconductor field-effect transistors manipulate real values for the widths (W) and lengths …
Optimal Sizing of Amplifiers by Evolutionary Algorithms with Integer Encoding and Design Method
The optimal sizing of analog integrated circuits (ICs) by evolutionary algorithms (EAs) has
the challenge of reducing the search spaces of the design variables, guaranteeing the …
the challenge of reducing the search spaces of the design variables, guaranteeing the …
Automatic sensitivity analysis tool for analog active filter
In this paper we deal with analog active filter design using discrete components taking into
consideration tolerance effects. Sensitivity analysis is performed to determine the most …
consideration tolerance effects. Sensitivity analysis is performed to determine the most …
Intelligent optimisation of analogue circuits using particle swarm optimisation, genetic programming and genetic folding
OJ Ushie - 2016 - bura.brunel.ac.uk
This research presents various intelligent optimisation methods which are: genetic algorithm
(GA), particle swarm optimisation (PSO), artificial bee colony algorithm (ABCA), firefly …
(GA), particle swarm optimisation (PSO), artificial bee colony algorithm (ABCA), firefly …
Optimization of analog integrated circuits including variations
ACS Borbón - 2014 - inaoe.repositorioinstitucional.mx
Automatic biasing and sizing of analog integrated circuits (ICs) remains an open challenge.
This Thesis introduces an automatic technique for sizing analog ICs through combining multi …
This Thesis introduces an automatic technique for sizing analog ICs through combining multi …