Automated HW/SW co-design for edge AI: State, challenges and steps ahead
Gigantic rates of data production in the era of Big Data, Internet of Thing (IoT), and Smart
Cyber Physical Systems (CPS) pose incessantly escalating demands for massive data …
Cyber Physical Systems (CPS) pose incessantly escalating demands for massive data …
New Systolic Array Algorithms and VLSI Architectures for 1-D MDST
In this paper, we present two systolic array algorithms for efficient Very-Large-Scale
Integration (VLSI) implementations of the 1-D Modified Discrete Sine Transform (MDST) …
Integration (VLSI) implementations of the 1-D Modified Discrete Sine Transform (MDST) …
Parameterized computing module generator based on a systolic array
VV Zunin, II Romanova - 2022 IEEE International Conference …, 2022 - ieeexplore.ieee.org
In this paper, the use of systolic arrays for data processing in the training or executing neural
networks is explored. Two types of systolic arrays were developed, and a comparison on …
networks is explored. Two types of systolic arrays were developed, and a comparison on …
FPGA-based optical character recognition for handwritten mathematical expressions
This paper presents the hardware design of optical character recognition for handwritten
mathematical expressions using field programmable gate array (FPGA). The OCR is based …
mathematical expressions using field programmable gate array (FPGA). The OCR is based …
Design of Quantized Deep Neural Network Hardware Inference Accelerator Using Systolic Architecture
This paper presents a hardware inference accelerator architecture of quantized deep neural
networks (DNN). The proposed accelerator implements all computation in a quantize …
networks (DNN). The proposed accelerator implements all computation in a quantize …
HW-Acceleration for Edge-AI
SS Prebeck - 2024 - mediatum.ub.tum.de
This thesis addresses the platform gap between embedded microcontroller and cloud
computing for neural network inferences on the Edge with a combined HW-SW-AI solution. A …
computing for neural network inferences on the Edge with a combined HW-SW-AI solution. A …