Hardware acceleration of EEG-based emotion classification systems: a comprehensive survey
Recent years have witnessed a growing interest in EEG-based wearable classifiers of
emotions, which could enable the real-time monitoring of patients suffering from …
emotions, which could enable the real-time monitoring of patients suffering from …
A 0.15 V input energy harvesting charge pump with dynamic body biasing and adaptive dead-time for efficiency improvement
J Kim, PKT Mok, C Kim - IEEE Journal of Solid-State Circuits, 2014 - ieeexplore.ieee.org
A charge pump using 0.13-μm CMOS process for low-voltage energy harvesting is
presented. A low-power adaptive dead-time (AD) circuit is used which automatically …
presented. A low-power adaptive dead-time (AD) circuit is used which automatically …
On monadic NP vs monadic co-NP
It is a well-known result of Fagin that the complexity class NP coincides with the class of
problems expressible in existential second-order logic (Σ11). Monadic NP is the class of …
problems expressible in existential second-order logic (Σ11). Monadic NP is the class of …
A 0.8-V 230-W 98-dB DR Inverter-Based Modulator for Audio Applications
H Luo, Y Han, RCC Cheung, X Liu… - IEEE Journal of Solid …, 2013 - ieeexplore.ieee.org
This paper presents a ΣΔ modulator based on a gain-boost class-C inverter for audio
applications. The gain-boost class-C inverter behaves as a low-voltage subthreshold …
applications. The gain-boost class-C inverter behaves as a low-voltage subthreshold …
A fully integrated CMOS tri-band ambient RF energy harvesting system for IoT devices
This article presents a fully integrated tri-band RF energy harvesting system (RFEH) in 65-
nm CMOS technology. The system is designed to harvest ambient RF energies at 900 MHz …
nm CMOS technology. The system is designed to harvest ambient RF energies at 900 MHz …
Low voltage logic circuits exploiting gate level dynamic body biasing in 28 nm UTBB FD-SOI
In this paper, the recently proposed gate level body bias (GLBB) technique is evaluated for
low voltage logic design in state-of-the-art 28 nm ultra-thin body and box (UTBB) fully …
low voltage logic design in state-of-the-art 28 nm ultra-thin body and box (UTBB) fully …
Highly-linear voltage-to-time converter (VTC) circuit for time-based analog-to-digital converters (T-ADCs)
Time-based ADC is an essential block in designing software radio receivers because it
exhibits higher speed and lower power compared to the conventional ADC, especially, at …
exhibits higher speed and lower power compared to the conventional ADC, especially, at …
Modeling and mitigation of static noise margin variation in subthreshold SRAM cells
N Zheng, P Mazumder - … Transactions on Circuits and Systems I …, 2017 - ieeexplore.ieee.org
In energy-constrained applications, SRAM systems operating in the subthreshold region are
often deployed to reduce power consumption. Subthreshold SRAM designs, however …
often deployed to reduce power consumption. Subthreshold SRAM designs, however …
Twenty years of near/sub-threshold design trends and enablement
This brief surveys the past 20 years of near/sub-threshold digital integrated circuit design.
Most of the chips have been highly characterized for voltage scaling down to near/sub …
Most of the chips have been highly characterized for voltage scaling down to near/sub …
Micro-scale variation-tolerant exponential tracking energy harvesting system for wireless sensor networks
Self-powered stand-alone electronic systems, targeting low power applications, are the
future of power management. In wireless sensor networks (WSNs) and implantable devices …
future of power management. In wireless sensor networks (WSNs) and implantable devices …