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Demonstration of multiply-accumulate operation with 28 nm fefet crossbar array
This letter reports a linear multiply-accumulate (MAC) operation conducted on a crossbar
memory array based on 28nm high-k metal gate (HKMG) Complementary Metal Oxide …
memory array based on 28nm high-k metal gate (HKMG) Complementary Metal Oxide …
[HTML][HTML] 28 nm high-k-metal gate ferroelectric field effect transistors based synapses—A comprehensive overview
In this invited article we present a comprehensive overview of 28 nm high-k-metal gate-
based ferroelectric field effect transistor devices for synaptic applications. The devices under …
based ferroelectric field effect transistor devices for synaptic applications. The devices under …
Synergistic Approach of Interfacial Layer Engineering and READ-Voltage Optimization in HfO2-Based FeFETs for In-Memory-Computing Applications
This article reports an improvement in the performance of the hafnium oxide-based (HfO2)
ferroelectric field-effect transistors (FeFET) achieved by a synergistic approach of interfacial …
ferroelectric field-effect transistors (FeFET) achieved by a synergistic approach of interfacial …
28 nm HKMG-based current limited FeFET crossbar-array for inference application
This article reports a novel ferroelectric field-effect transistor (FeFET)-based crossbar array
cascaded with an external resistor. The external resistor is shunted with the column of the …
cascaded with an external resistor. The external resistor is shunted with the column of the …
Ferroelectric Content-Addressable Memory Cells with IGZO Channel: Impact of Retention Degradation on the Multibit Operation
Indium gallium zinc oxide (IGZO)-based ferroelectric thin-film transistors (FeTFTs) are being
vigorously investigated for being deployed in computing-in-memory (CIM) applications …
vigorously investigated for being deployed in computing-in-memory (CIM) applications …
Multilevel operation of ferroelectric fet memory arrays considering current percolation paths impacting switching behavior
This letter reports multi-level-cell (MLC) operation of ferroelectric FETs (FeFET) arranged in
AND-connected memory arrays with a bit-error rate (BER) of 4% when writing a random data …
AND-connected memory arrays with a bit-error rate (BER) of 4% when writing a random data …
The working principle, structural design and material development of ferroelectric field-effect transistors and random-access memories
Y Chen, S Wang, F Liu, B Wu, Y Deng, R Tao… - Journal of Alloys and …, 2024 - Elsevier
Ferroelectric memory, recognized as a prominent type of non-volatile memory, is expected to
play a key role in the emerging in-memory applications. This review examines the …
play a key role in the emerging in-memory applications. This review examines the …
An efficient and accurate memristive memory for array-based spiking neural networks
Memristors provide a tempting solution for weighted synapse connections in neuromorphic
computing due to their size and non-volatile nature. However, memristors are unreliable in …
computing due to their size and non-volatile nature. However, memristors are unreliable in …
1f-1t array: Current limiting transistor cascoded fefet memory array for variation tolerant vector-matrix multiplication operation
This letter proposes a memory cell, denoted by 1F-1 T, consisting of a ferroelectric field-
effect transistor (FeFET) cascaded with another current-limiting transistor (T). The transistor …
effect transistor (FeFET) cascaded with another current-limiting transistor (T). The transistor …
Optimizations for a current-controlled memristor-based neuromorphic synapse design
The synapse is a key element of neuromorphic computing in terms of efficiency and
accuracy. In this paper, an optimized current-controlled memristive synapse circuit is …
accuracy. In this paper, an optimized current-controlled memristive synapse circuit is …