Scalable FPGA-based architecture for DCT computation using dynamic partial reconfiguration
In this article, we propose field programmable gate array-based scalable architecture for
discrete cosine transform (DCT) computation using dynamic partial reconfiguration. Our …
discrete cosine transform (DCT) computation using dynamic partial reconfiguration. Our …
Low-power and high-quality Cordic-based Loeffler DCT for signal processing
A computationally efficient and high-quality preserving discrete cosine transform (DCT)
architecture is presented. It is obtained by optimising the Loeffler DCT based on the …
architecture is presented. It is obtained by optimising the Loeffler DCT based on the …
A 250MHz optimized distributed architecture of 2D 8x8 DCT
P Chungan, C **xin, Y Dunshan… - 2007 7th International …, 2007 - ieeexplore.ieee.org
Discrete Cosine Transform (DCT) plays an important role in image and video compression,
but computing a two-dimensional (2D) DCT, a large number of multiplications and additions …
but computing a two-dimensional (2D) DCT, a large number of multiplications and additions …
Design of a low-power, high performance, 8× 8 bit multiplier using a Shannon-based adder cell
In this paper, we have developed a new full-adder cell using multiplexing control input
techniques (MCIT) for the sum operation and the Shannon-based technique to implement …
techniques (MCIT) for the sum operation and the Shannon-based technique to implement …
A computationally efficient high-quality cordic based DCT
In this paper a computationally efficient and high-quality preserving DCT architecture is
presented. It is obtained by optimizing the Loeffler DCT based on the Cordic algorithm. The …
presented. It is obtained by optimizing the Loeffler DCT based on the Cordic algorithm. The …
A self-reconfigurable platform for scalable DCT computation using compressed partial bitstreams and BlockRAM prefetching
J Huang, J Lee - IEEE Transactions on Circuits and Systems …, 2009 - ieeexplore.ieee.org
In this paper, we propose a self-reconfigurable platform which can reconfigure the
architecture of discrete cosine transform (DCT) computations during run-time using dynamic …
architecture of discrete cosine transform (DCT) computations during run-time using dynamic …
Multiplication-free 8× 8 2D DCT architecture using algebraic integer encoding
V Dimitrov, K Wahid, G Jullien - Electronics Letters, 2004 - IET
A novel architecture for a 2D 8× 8 discrete cosine transform (DCT) is presented. The
architecture uses a new algebraic integer encoding of a 1D radix-8 DCT that allows the …
architecture uses a new algebraic integer encoding of a 1D radix-8 DCT that allows the …
A new time distributed DCT architecture for MPEG-4 hardware reference model
This paper presents the design of a new time distributed architecture (TDA) which outlines
the architecture (ISO/IEC JTC1/SC29/WG11 MPEG2002/M8565) submitted to MPEG4 Part9 …
the architecture (ISO/IEC JTC1/SC29/WG11 MPEG2002/M8565) submitted to MPEG4 Part9 …
Error-free computation of 8/spl times/8 2D DCT and IDCT using two-dimensional algebraic integer quantization
K Wahid, V Dimitrov, G Jullien - 17th IEEE Symposium on …, 2005 - ieeexplore.ieee.org
This paper presents a novel error-free (infinite-precision) architecture for the fast
implementation of both 8/spl times/8 2D discrete cosine transform and inverse DCT. The …
implementation of both 8/spl times/8 2D discrete cosine transform and inverse DCT. The …
[PDF][PDF] Multiplierless DCT algorithm for image compression applications
V Dimitrov, K Wahid - vol, 2004 - foibg.com
This paper presents a novel error-free (infinite-precision) architecture for the fast
implementation of 8x8 2-D Discrete Cosine Transform. The architecture uses a new …
implementation of 8x8 2-D Discrete Cosine Transform. The architecture uses a new …